{
  "schema_version": "1.3",
  "url": "https://trustbutveri.fyi/explorer/?mechanisms=M-0002,M-0010,M-0009&ready=R1",
  "data_generated": "2026-10-09",
  "definitions": {
    "methodology": "https://trustbutveri.fyi/about/methodology/",
    "readiness": "https://trustbutveri.fyi/about/readiness/",
    "filters": [
      {
        "id": "prover",
        "label": "Prover",
        "question": "How far can the party being checked be trusted?",
        "options": [
          {
            "value": "cooperative",
            "label": "Cooperative"
          },
          {
            "value": "semi-trusted",
            "label": "Semi-trusted"
          },
          {
            "value": "adversarial",
            "label": "Adversarial"
          }
        ],
        "rule": "Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption.",
        "about": "The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions."
      },
      {
        "id": "onsite",
        "label": "Verifier devices on site",
        "question": "May the verifier install its own hardware at the prover's sites?",
        "options": [
          {
            "value": "no",
            "label": "Not allowed"
          }
        ],
        "rule": "\"Not allowed\" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor.",
        "about": "Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered."
      },
      {
        "id": "coop",
        "label": "Prover cooperation",
        "question": "How much must the prover take part?",
        "options": [
          {
            "value": "partial",
            "label": "Partial at most"
          },
          {
            "value": "none",
            "label": "Not required"
          }
        ],
        "rule": "\"Partial at most\" removes mechanisms that need the prover's active participation. \"Not required\" keeps only those that work without it.",
        "about": "Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery."
      },
      {
        "id": "chips",
        "label": "Chips",
        "question": "May the proposal depend on new chip designs?",
        "options": [
          {
            "value": "existing",
            "label": "Existing chips only"
          }
        ],
        "rule": "\"Existing chips only\" removes mechanisms that need changes to future chip designs.",
        "about": "New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay."
      },
      {
        "id": "ready",
        "label": "Minimum development status",
        "question": "Development status",
        "options": [
          {
            "value": "R1",
            "label": "Proposed"
          },
          {
            "value": "R2",
            "label": "Research demonstration"
          },
          {
            "value": "R3",
            "label": "Operational use"
          },
          {
            "value": "R4",
            "label": "Legacy independent-evaluation filter",
            "legacy": true
          }
        ],
        "rule": "Keeps mechanisms whose readiness level is at least this one.",
        "about": "A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws."
      },
      {
        "id": "tested",
        "label": "Attack testing",
        "question": "How hard has each mechanism been attacked in public?",
        "options": [
          {
            "value": "analysis",
            "label": "Published analysis"
          },
          {
            "value": "red-teamed",
            "label": "Red-teamed"
          },
          {
            "value": "independent-red-team",
            "label": "Independent red-team"
          }
        ],
        "rule": "Keeps mechanisms whose strongest published attack testing is at least this.",
        "about": "The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them."
      },
      {
        "id": "hide",
        "label": "Keep hidden from the verifier",
        "question": "What must the verifier never see?",
        "options": [
          {
            "value": "weights",
            "label": "Model weights"
          },
          {
            "value": "io",
            "label": "Inputs and outputs"
          },
          {
            "value": "training",
            "label": "Training data"
          }
        ],
        "rule": "Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.",
        "about": "Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet."
      }
    ],
    "exposure": "For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.",
    "claim_status": {
      "addressed": "A mechanism in the proposal is aimed at this claim and is not excluded by the filters.",
      "partly-addressed": "Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.",
      "unaddressed": "No mechanism in the proposal addresses this claim."
    },
    "finding_classification": {
      "failure": {
        "label": "Known failures",
        "singular": "Known failure",
        "anchor": "known-flaws"
      },
      "scope-limitation": {
        "label": "Scope limitations",
        "singular": "Scope limitation",
        "anchor": "scope-limitations"
      },
      "open-question": {
        "label": "Open questions",
        "singular": "Open question",
        "anchor": "open-questions"
      }
    },
    "finding_scope": "Evidence scope describes where a finding was demonstrated; it does not establish applicability to every implementation in the mechanism family.",
    "claim_finding_scope": "open_critical_findings names active failures on the assessed records; open_critical_context names conditional family failures whose implementation applicability is unassessed.",
    "legacy_status": "The status field retains covered/partial/none for compatibility. It names claim links, never successful verification. Use claim_status and status_label for presentation."
  },
  "filters": {
    "prover": "",
    "onsite": "",
    "coop": "",
    "chips": "",
    "ready": "R1",
    "tested": "",
    "hide": []
  },
  "mechanisms_passing_filters": 25,
  "claims": [],
  "mechanisms": [
    {
      "id": "M-0002",
      "title": "Deterministic and bit-exact inference",
      "url": "https://trustbutveri.fyi/mechanisms/deterministic-inference/",
      "assessment_record": {
        "id": "M-0002",
        "title": "Deterministic and bit-exact inference",
        "url": "https://trustbutveri.fyi/mechanisms/deterministic-inference/"
      },
      "finding_counts": {
        "failure": 0,
        "scope_limitation": 2,
        "open_question": 0,
        "open_failures": {
          "critical": 0,
          "significant": 0,
          "minor": 0
        }
      },
      "selected_implementation": null,
      "readiness": {
        "level": "R3",
        "scope": "reproducing open-model inference from receipts in Gensyn's information-market service",
        "confidence": "low",
        "evidence": [
          "S-0020",
          "S-1009",
          "S-1010",
          "S-1012",
          "S-1013",
          "S-1812",
          "S-3021",
          "S-3022",
          "S-3023",
          "S-0075"
        ]
      },
      "development_status": {
        "code": "R3",
        "label": "Operational use",
        "short": "Operational use",
        "rank": 3,
        "legacy_code": "R3"
      },
      "security_evidence": {
        "attack_testing": {
          "status": "analysis",
          "label": "Published security analysis",
          "kind": "analysis"
        },
        "independent_evaluation": {
          "status": "unassessed"
        },
        "formal_proof": {
          "status": "unassessed"
        },
        "deployment_assurance": {
          "status": "unassessed"
        },
        "legacy_evaluation_code": null,
        "scoped_findings": [],
        "open_failures": {
          "critical": 0,
          "significant": 0,
          "minor": 0
        }
      },
      "assessed_properties": {
        "threat_model": "adversarial",
        "hardware_requirement": "none",
        "prover_cooperation": "required",
        "adversarial_evaluation": "analysis"
      },
      "claims": [],
      "exposure": {
        "weights": "partial",
        "io": "partial",
        "training": "none",
        "note": "Exact replay needs the weights, configuration and replayed requests inside the recomputation environment. What the verifier sees depends on whether that environment keeps them confidential.",
        "sources": [
          "S-0018",
          "S-0020"
        ]
      },
      "family_finding_context": [],
      "filter_issues": []
    },
    {
      "id": "M-0010",
      "title": "On-chip telemetry from timing, memory and performance counters",
      "url": "https://trustbutveri.fyi/mechanisms/on-chip-telemetry/",
      "assessment_record": {
        "id": "M-0010",
        "title": "On-chip telemetry from timing, memory and performance counters",
        "url": "https://trustbutveri.fyi/mechanisms/on-chip-telemetry/"
      },
      "finding_counts": {
        "failure": 2,
        "scope_limitation": 2,
        "open_question": 1,
        "open_failures": {
          "critical": 0,
          "significant": 2,
          "minor": 0
        }
      },
      "selected_implementation": null,
      "readiness": {
        "level": "R2",
        "scope": "workload evidence from GPU counters and timing, assuming authentic measurements",
        "confidence": "medium",
        "evidence": [
          "S-0033",
          "S-0034",
          "S-0037"
        ]
      },
      "development_status": {
        "code": "R2",
        "label": "Research demonstration",
        "short": "Research demo",
        "rank": 2,
        "legacy_code": "R2"
      },
      "security_evidence": {
        "attack_testing": {
          "status": "red-teamed",
          "label": "Published attack testing",
          "kind": "practical",
          "attribution": "Developers or collaborators"
        },
        "independent_evaluation": {
          "status": "unassessed"
        },
        "formal_proof": {
          "status": "unassessed"
        },
        "deployment_assurance": {
          "status": "unassessed"
        },
        "legacy_evaluation_code": null,
        "scoped_findings": [
          {
            "n": 2,
            "severity": "significant",
            "status": "open",
            "evidence_scope": "unassessed",
            "sources": [
              "S-0037"
            ]
          },
          {
            "n": 4,
            "severity": "significant",
            "status": "open",
            "evidence_scope": "unassessed",
            "sources": [
              "S-0014",
              "S-1200"
            ]
          }
        ],
        "open_failures": {
          "critical": 0,
          "significant": 2,
          "minor": 0
        }
      },
      "assessed_properties": {
        "threat_model": "semi-trusted",
        "hardware_requirement": "existing-features",
        "prover_cooperation": "partial",
        "adversarial_evaluation": "red-teamed"
      },
      "claims": [],
      "exposure": {
        "weights": "partial",
        "io": "partial",
        "training": "partial",
        "note": "Counters do not read weights or data, but richer counters can leak secrets through side channels."
      },
      "family_finding_context": [],
      "filter_issues": []
    },
    {
      "id": "M-0009",
      "title": "Hardware-enabled guarantees (flexHEG) and guarantee processors",
      "url": "https://trustbutveri.fyi/mechanisms/flexheg-guarantee-processors/",
      "assessment_record": {
        "id": "M-0009",
        "title": "Hardware-enabled guarantees (flexHEG) and guarantee processors",
        "url": "https://trustbutveri.fyi/mechanisms/flexheg-guarantee-processors/"
      },
      "finding_counts": {
        "failure": 3,
        "scope_limitation": 2,
        "open_question": 1,
        "open_failures": {
          "critical": 0,
          "significant": 3,
          "minor": 0
        }
      },
      "selected_implementation": null,
      "readiness": {
        "level": "R1",
        "scope": "checking and enforcing training-compute limits on chips, against adversaries up to states",
        "confidence": "medium",
        "evidence": [
          "S-0035",
          "S-1204",
          "S-1205",
          "S-0057",
          "S-0056",
          "S-0006"
        ]
      },
      "development_status": {
        "code": "R1",
        "label": "Proposed",
        "short": "Proposed",
        "rank": 1,
        "legacy_code": "R1"
      },
      "security_evidence": {
        "attack_testing": {
          "status": "analysis",
          "label": "Published security analysis",
          "kind": "analysis"
        },
        "independent_evaluation": {
          "status": "unassessed"
        },
        "formal_proof": {
          "status": "unassessed"
        },
        "deployment_assurance": {
          "status": "unassessed"
        },
        "legacy_evaluation_code": null,
        "scoped_findings": [
          {
            "n": 1,
            "severity": "significant",
            "status": "open",
            "evidence_scope": "unassessed",
            "sources": [
              "S-1204",
              "S-0057"
            ]
          },
          {
            "n": 2,
            "severity": "significant",
            "status": "open",
            "evidence_scope": "unassessed",
            "sources": [
              "S-1204"
            ]
          },
          {
            "n": 4,
            "severity": "significant",
            "status": "open",
            "evidence_scope": "unassessed",
            "sources": [
              "S-1204"
            ]
          }
        ],
        "open_failures": {
          "critical": 0,
          "significant": 3,
          "minor": 0
        }
      },
      "assessed_properties": {
        "threat_model": "adversarial",
        "hardware_requirement": "new-chip",
        "prover_cooperation": "required",
        "adversarial_evaluation": "analysis"
      },
      "claims": [],
      "exposure": {
        "weights": "hidden",
        "io": "hidden",
        "training": "hidden",
        "note": "The guarantee processor sees the chip's traffic inside a sealed enclosure and reports only whether rules were kept."
      },
      "family_finding_context": [],
      "filter_issues": []
    }
  ],
  "strengths": {
    "covered": [],
    "production": [
      "M-0002"
    ],
    "operationalUse": [
      "M-0002"
    ],
    "adversarial": [
      "M-0002",
      "M-0009"
    ],
    "noNewHardware": [
      "M-0002",
      "M-0010"
    ],
    "mitigated": [],
    "notCounted": []
  },
  "properties": {
    "covered": [],
    "production": [
      "M-0002"
    ],
    "operationalUse": [
      "M-0002"
    ],
    "adversarial": [
      "M-0002",
      "M-0009"
    ],
    "noNewHardware": [
      "M-0002",
      "M-0010"
    ],
    "mitigated": [],
    "notCounted": []
  },
  "attack_testing": [
    {
      "id": "M-0002",
      "record": "M-0002",
      "evaluation": "analysis",
      "in_setting": true
    },
    {
      "id": "M-0010",
      "record": "M-0010",
      "evaluation": "red-teamed",
      "in_setting": true
    },
    {
      "id": "M-0009",
      "record": "M-0009",
      "evaluation": "analysis",
      "in_setting": true
    }
  ],
  "selected_implementations": {},
  "weaknesses": {
    "gaps": [],
    "excluded": [],
    "unlinked": [],
    "critical": [],
    "significant": [
      {
        "mech": "M-0010",
        "n": 2,
        "historical": false,
        "title": "Adversarially disguised fine-tuning partly evades classification",
        "classification": "failure",
        "kind": "demonstrated-attack",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Across 20 evasion strategy families in five monitor-evader rounds, the classifier's accuracy against the most challenging disguised workloads held out from training was 43–87%. White-box LoRA fine-tuning was the only evasion family detected less than half the time. The evaluation covered single nodes, PyTorch-level evasion and NVIDIA hardware.",
        "response": null,
        "sources": [
          "S-0037"
        ]
      },
      {
        "mech": "M-0010",
        "n": 4,
        "historical": false,
        "title": "Counters leak information about protected workloads",
        "classification": "failure",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Performance counters have been used as a side channel against TEEs, for example in CounterSEVeillance. NVIDIA disables performance counters in full confidential-computing mode, stating that they could provide an avenue for side-channel attacks. Richer counters for verification therefore pull against confidentiality.",
        "response": null,
        "sources": [
          "S-0014",
          "S-1200"
        ]
      },
      {
        "mech": "M-0009",
        "n": 1,
        "historical": false,
        "title": "State attackers can likely defeat current secure enclosures",
        "classification": "failure",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "The flexHEG authors write that \"nation-state attackers can likely compromise the best current secure enclosures\", and that the marginal cost of circumvention per device is hard to estimate. RAND similarly judges that anti-tamper measures \"would not be insurmountable for a determined and well-resourced adversary\", although they raise costs and can reveal tampering.",
        "response": null,
        "sources": [
          "S-1204",
          "S-0057"
        ]
      },
      {
        "mech": "M-0009",
        "n": 2,
        "historical": false,
        "title": "Firmware-only retrofits rely on Secure Boot, which fault injection can bypass",
        "classification": "failure",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Part II notes that the most common attack on Secure Boot replaces the firmware and applies a voltage glitch while the signature is being checked. It also notes that sophisticated actors may use microprobing or laser voltage probing to read key registers.",
        "response": null,
        "sources": [
          "S-1204"
        ]
      },
      {
        "mech": "M-0009",
        "n": 4,
        "historical": false,
        "title": "FLOP accounting can be laundered through external data",
        "classification": "failure",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Results of earlier or parallel workloads could be hidden in the \"external data\" fed to a device, which would falsify the total FLOP count unless the inputs are explained or time delays are imposed.",
        "response": null,
        "sources": [
          "S-1204"
        ]
      }
    ],
    "criticalMechanisms": [],
    "significantMechanisms": [
      "M-0010",
      "M-0009"
    ],
    "familyContext": [],
    "scopeLimitations": [
      {
        "mech": "M-0002",
        "n": 1,
        "historical": false,
        "title": "Some kernels remain genuinely nondeterministic",
        "classification": "scope-limitation",
        "kind": "open-question",
        "severity": "minor",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "The bit-exact work separates kernels that are deterministic but not batch-invariant from truly nondeterministic ones that use atomic functions. Some integer de-quantization kernels use atomic additions and remain nondeterministic, so exact replay needs backends that avoid them.",
        "response": null,
        "sources": [
          "S-0020"
        ]
      },
      {
        "mech": "M-0002",
        "n": 2,
        "historical": false,
        "title": "Cross-hardware replay relies on reverse-engineered, closed behaviour",
        "classification": "scope-limitation",
        "kind": "open-question",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Emulating one GPU's rounding on another requires reverse-engineering tensor-core arithmetic and modelling proprietary kernel choices. Hawkeye covers a subset of NVIDIA architectures and states that attention and other higher-level operations need further reverse engineering. For the bit-exact emulator, a proprietary Hopper kernel family is an open edge case.",
        "response": null,
        "sources": [
          "S-1010",
          "S-0020"
        ]
      },
      {
        "mech": "M-0010",
        "n": 1,
        "historical": false,
        "title": "Software-read telemetry can be forged by the operator",
        "classification": "scope-limitation",
        "kind": "theoretical-argument",
        "severity": "critical",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "NVML-based classification assumes trustworthy telemetry. Without a tamper-resistant read path, an authenticated telemetry channel and secure boot of the monitoring software, an operator who controls the full software stack could forge counter values. Monfared et al. start from the same premise: current GPUs expose little trusted telemetry and can be modified or virtualized.",
        "response": null,
        "sources": [
          "S-0037",
          "S-0033"
        ],
        "helps": [
          {
            "by": "M-0009",
            "how": "A guarantee processor on the chip would give the tamper-resistant, authenticated telemetry path the flaw says is missing."
          }
        ]
      },
      {
        "mech": "M-0010",
        "n": 3,
        "historical": false,
        "title": "Timing challenges do not identify the individual chip",
        "classification": "scope-limitation",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "GEMM and VDF challenges can be answered by identical GPUs elsewhere, and floating-point fingerprints distinguish GPU models, not individual devices. GPU virtualization adds timing leakage that prevents attributing compute use.",
        "response": null,
        "sources": [
          "S-0033"
        ]
      },
      {
        "mech": "M-0009",
        "n": 3,
        "historical": false,
        "title": "Many important rules cannot be checked on-chip",
        "classification": "scope-limitation",
        "kind": "theoretical-argument",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Malicious intent \"is not a technical property observable on-chip\", and misuse depends on what is done with a computation's results. A guarantee processor cannot easily tell whether a network is the whole system or one expert in a mixture-of-experts system. Part III judges that a fully local ruleset \"may not be entirely feasible\" for the same reason.",
        "response": null,
        "sources": [
          "S-0035",
          "S-1205"
        ]
      },
      {
        "mech": "M-0009",
        "n": 6,
        "historical": false,
        "title": "Coverage stops at flexHEG-equipped chips",
        "classification": "scope-limitation",
        "kind": "open-question",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Motivated actors will always be able to use some compute that is not flexHEG-equipped. Recalling existing consumer GPUs would likely be impractical, and reaching perfect coverage, or conclusively proving that no secret government data centres exist, would be \"practically quite difficult\".",
        "response": null,
        "sources": [
          "S-0035",
          "S-1205"
        ],
        "helps": [
          {
            "by": "M-0019",
            "how": "Accounts for which chips exist and who holds them."
          },
          {
            "by": "M-0020",
            "how": "Looks for undeclared facilities that hold other chips."
          }
        ]
      }
    ],
    "openQuestions": [
      {
        "mech": "M-0010",
        "n": 5,
        "historical": false,
        "title": "No quantified error rates or formal thresholds for timing primitives",
        "classification": "open-question",
        "kind": "open-question",
        "severity": "minor",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Monfared et al. state that false-positive and false-negative rates are not quantified and leave hardware-specific formal thresholds to future work.",
        "response": null,
        "sources": [
          "S-0033"
        ]
      },
      {
        "mech": "M-0009",
        "n": 5,
        "historical": false,
        "title": "Supply-chain diversion and hidden backdoors",
        "classification": "open-question",
        "kind": "open-question",
        "severity": "significant",
        "status": "open",
        "evidence_scope": null,
        "scope_note": null,
        "related_finding": null,
        "description": "Components could be diverted before a guarantee processor is added, and backdoors could be introduced during design or manufacturing. Open-source designs and physical scans of randomly selected chips are proposed as countermeasures. Part III proposes international oversight of production and extensive testing of a random sample of finished devices.",
        "response": null,
        "sources": [
          "S-1204",
          "S-1205"
        ],
        "helps": [
          {
            "by": "M-0019",
            "how": "Records each chip's identity and owner from the fab onwards, which bears on diversion before a guarantee processor is fitted. It does not address hidden backdoors."
          }
        ]
      }
    ],
    "minor": 0,
    "minorFindings": [],
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      "M-0009"
    ],
    "newChip": [
      "M-0009"
    ]
  },
  "findings": [
    {
      "mech": "M-0002",
      "record": "M-0002",
      "n": 1,
      "historical": false,
      "title": "Some kernels remain genuinely nondeterministic",
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      "severity": "minor",
      "status": "open",
      "evidence_scope": null,
      "scope_note": null,
      "related_finding": null,
      "description": "The bit-exact work separates kernels that are deterministic but not batch-invariant from truly nondeterministic ones that use atomic functions. Some integer de-quantization kernels use atomic additions and remain nondeterministic, so exact replay needs backends that avoid them.",
      "response": null,
      "sources": [
        "S-0020"
      ]
    },
    {
      "mech": "M-0002",
      "record": "M-0002",
      "n": 2,
      "historical": false,
      "title": "Cross-hardware replay relies on reverse-engineered, closed behaviour",
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      "severity": "significant",
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      "evidence_scope": null,
      "scope_note": null,
      "related_finding": null,
      "description": "Emulating one GPU's rounding on another requires reverse-engineering tensor-core arithmetic and modelling proprietary kernel choices. Hawkeye covers a subset of NVIDIA architectures and states that attention and other higher-level operations need further reverse engineering. For the bit-exact emulator, a proprietary Hopper kernel family is an open edge case.",
      "response": null,
      "sources": [
        "S-1010",
        "S-0020"
      ]
    },
    {
      "mech": "M-0010",
      "record": "M-0010",
      "n": 1,
      "historical": false,
      "title": "Software-read telemetry can be forged by the operator",
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      "severity": "critical",
      "status": "open",
      "evidence_scope": null,
      "scope_note": null,
      "related_finding": null,
      "description": "NVML-based classification assumes trustworthy telemetry. Without a tamper-resistant read path, an authenticated telemetry channel and secure boot of the monitoring software, an operator who controls the full software stack could forge counter values. Monfared et al. start from the same premise: current GPUs expose little trusted telemetry and can be modified or virtualized.",
      "response": null,
      "sources": [
        "S-0037",
        "S-0033"
      ],
      "helps": [
        {
          "by": "M-0009",
          "how": "A guarantee processor on the chip would give the tamper-resistant, authenticated telemetry path the flaw says is missing."
        }
      ]
    },
    {
      "mech": "M-0010",
      "record": "M-0010",
      "n": 2,
      "historical": false,
      "title": "Adversarially disguised fine-tuning partly evades classification",
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      "scope_note": null,
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      "description": "Across 20 evasion strategy families in five monitor-evader rounds, the classifier's accuracy against the most challenging disguised workloads held out from training was 43–87%. White-box LoRA fine-tuning was the only evasion family detected less than half the time. The evaluation covered single nodes, PyTorch-level evasion and NVIDIA hardware.",
      "response": null,
      "sources": [
        "S-0037"
      ]
    },
    {
      "mech": "M-0010",
      "record": "M-0010",
      "n": 3,
      "historical": false,
      "title": "Timing challenges do not identify the individual chip",
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      "evidence_scope": null,
      "scope_note": null,
      "related_finding": null,
      "description": "GEMM and VDF challenges can be answered by identical GPUs elsewhere, and floating-point fingerprints distinguish GPU models, not individual devices. GPU virtualization adds timing leakage that prevents attributing compute use.",
      "response": null,
      "sources": [
        "S-0033"
      ]
    },
    {
      "mech": "M-0010",
      "record": "M-0010",
      "n": 4,
      "historical": false,
      "title": "Counters leak information about protected workloads",
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      "scope_note": null,
      "related_finding": null,
      "description": "Performance counters have been used as a side channel against TEEs, for example in CounterSEVeillance. NVIDIA disables performance counters in full confidential-computing mode, stating that they could provide an avenue for side-channel attacks. Richer counters for verification therefore pull against confidentiality.",
      "response": null,
      "sources": [
        "S-0014",
        "S-1200"
      ]
    },
    {
      "mech": "M-0010",
      "record": "M-0010",
      "n": 5,
      "historical": false,
      "title": "No quantified error rates or formal thresholds for timing primitives",
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      "severity": "minor",
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      "scope_note": null,
      "related_finding": null,
      "description": "Monfared et al. state that false-positive and false-negative rates are not quantified and leave hardware-specific formal thresholds to future work.",
      "response": null,
      "sources": [
        "S-0033"
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 1,
      "historical": false,
      "title": "State attackers can likely defeat current secure enclosures",
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      "status": "open",
      "evidence_scope": null,
      "scope_note": null,
      "related_finding": null,
      "description": "The flexHEG authors write that \"nation-state attackers can likely compromise the best current secure enclosures\", and that the marginal cost of circumvention per device is hard to estimate. RAND similarly judges that anti-tamper measures \"would not be insurmountable for a determined and well-resourced adversary\", although they raise costs and can reveal tampering.",
      "response": null,
      "sources": [
        "S-1204",
        "S-0057"
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 2,
      "historical": false,
      "title": "Firmware-only retrofits rely on Secure Boot, which fault injection can bypass",
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      "scope_note": null,
      "related_finding": null,
      "description": "Part II notes that the most common attack on Secure Boot replaces the firmware and applies a voltage glitch while the signature is being checked. It also notes that sophisticated actors may use microprobing or laser voltage probing to read key registers.",
      "response": null,
      "sources": [
        "S-1204"
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 3,
      "historical": false,
      "title": "Many important rules cannot be checked on-chip",
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      "scope_note": null,
      "related_finding": null,
      "description": "Malicious intent \"is not a technical property observable on-chip\", and misuse depends on what is done with a computation's results. A guarantee processor cannot easily tell whether a network is the whole system or one expert in a mixture-of-experts system. Part III judges that a fully local ruleset \"may not be entirely feasible\" for the same reason.",
      "response": null,
      "sources": [
        "S-0035",
        "S-1205"
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 4,
      "historical": false,
      "title": "FLOP accounting can be laundered through external data",
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      "scope_note": null,
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      "description": "Results of earlier or parallel workloads could be hidden in the \"external data\" fed to a device, which would falsify the total FLOP count unless the inputs are explained or time delays are imposed.",
      "response": null,
      "sources": [
        "S-1204"
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 5,
      "historical": false,
      "title": "Supply-chain diversion and hidden backdoors",
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      "description": "Components could be diverted before a guarantee processor is added, and backdoors could be introduced during design or manufacturing. Open-source designs and physical scans of randomly selected chips are proposed as countermeasures. Part III proposes international oversight of production and extensive testing of a random sample of finished devices.",
      "response": null,
      "sources": [
        "S-1204",
        "S-1205"
      ],
      "helps": [
        {
          "by": "M-0019",
          "how": "Records each chip's identity and owner from the fab onwards, which bears on diversion before a guarantee processor is fitted. It does not address hidden backdoors."
        }
      ]
    },
    {
      "mech": "M-0009",
      "record": "M-0009",
      "n": 6,
      "historical": false,
      "title": "Coverage stops at flexHEG-equipped chips",
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      "description": "Motivated actors will always be able to use some compute that is not flexHEG-equipped. Recalling existing consumer GPUs would likely be impractical, and reaching perfect coverage, or conclusively proving that no secret government data centres exist, would be \"practically quite difficult\".",
      "response": null,
      "sources": [
        "S-0035",
        "S-1205"
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      "helps": [
        {
          "by": "M-0019",
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          "how": "Looks for undeclared facilities that hold other chips."
        }
      ]
    }
  ],
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      "id": "M-0017",
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        "legacy_code": "R2"
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            "n": 3,
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              "S-3261"
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          "kind": "blocker",
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          "text": "State-level attackers who hold the hardware can likely compromise the best current secure enclosures."
        }
      ]
    },
    {
      "id": "M-0019",
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      "url": "https://trustbutveri.fyi/mechanisms/chip-registries-and-manufacturing-records/",
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          {
            "n": 2,
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          }
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        }
      },
      "fits_filters": true,
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        {
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          "text": "Governing all relevant chips depends on knowing where they are, through chip registries and detection of undeclared facilities."
        }
      ]
    },
    {
      "id": "M-0008",
      "title": "TEE remote attestation for AI workloads",
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        "label": "Operational use",
        "short": "Operational use",
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              "S-1212",
              "S-3127"
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          },
          {
            "n": 2,
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              "S-1211"
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          },
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            "sources": [
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              "S-1213",
              "S-3127",
              "S-3128"
            ]
          },
          {
            "n": 4,
            "severity": "significant",
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            "sources": [
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          },
          {
            "n": 5,
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            "sources": [
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              "S-0009",
              "S-0014",
              "S-3123",
              "S-3129"
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          },
          {
            "n": 8,
            "severity": "significant",
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              "S-0009",
              "S-3130",
              "S-3131"
            ]
          }
        ],
        "open_failures": {
          "critical": 2,
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          "minor": 0
        }
      },
      "fits_filters": true,
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        {
          "kind": "prerequisite",
          "mech": "M-0010"
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        {
          "kind": "prerequisite",
          "mech": "M-0009"
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      ]
    }
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        "id": "M-0008",
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      {
        "id": "M-0019",
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    ],
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      {
        "id": "M-0008",
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      }
    ],
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      {
        "mech": "M-0002",
        "n": 1,
        "historical": false,
        "text": "Batch-invariant kernels cost throughput: in Thinking Machines' Qwen3-8B test, an improved deterministic build took 42 s against 26 s for vLLM's default, and SGLang reports an average 34.35% slowdown on its FlashInfer and FlashAttention 3 backends.",
        "theme": "performance-compatibility",
        "blocked_by": null,
        "sources": [
          "S-1009",
          "S-1012"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0002",
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        "historical": false,
        "text": "Coverage is incomplete: the bit-exact emulator targets dense blocks on NVIDIA GPUs and excludes mixture-of-experts inference and training, and vLLM's batch-invariant mode is in beta, with open work on AMD hardware and speculative decoding.",
        "theme": "performance-compatibility",
        "blocked_by": null,
        "sources": [
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          "S-1814"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0002",
        "n": 3,
        "historical": false,
        "text": "Amodo's status page for the AI 2040 verification plan rates a reproducible inference stack for that plan as 'not started'.",
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        "blocked_by": null,
        "sources": [
          "S-1008"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0002",
        "n": 4,
        "historical": false,
        "text": "Exact replay requires the prover to disclose weights, software versions, parallelism and batch sizes to whoever recomputes.",
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        "sources": [
          "S-0020",
          "S-0018"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0010",
        "n": 1,
        "historical": false,
        "text": "Shipping accelerators need a tamper-resistant, authenticated telemetry path.",
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        "blocked_by": "M-0009",
        "sources": [
          "S-0037",
          "S-0034"
        ],
        "inProposal": true
      },
      {
        "mech": "M-0010",
        "n": 2,
        "historical": false,
        "text": "NVIDIA's full confidential-computing mode disables the hardware performance counters its profiling tools use, so telemetry that needs them conflicts with it.",
        "theme": "privacy-leakage",
        "blocked_by": null,
        "sources": [
          "S-1200",
          "S-0014"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0010",
        "n": 3,
        "historical": false,
        "text": "Continuous challenge puzzles cost power and throughput on production workloads.",
        "theme": "performance-compatibility",
        "blocked_by": null,
        "sources": [
          "S-0033"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0010",
        "n": 4,
        "historical": false,
        "text": "Evaluation has not gone beyond single nodes, framework-level evasion and one vendor's hardware.",
        "theme": "adversarial-validation",
        "blocked_by": null,
        "sources": [
          "S-0037"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0009",
        "n": 1,
        "historical": false,
        "text": "Integrated flexHEG needs substantial help from the accelerator manufacturer, and the authors estimate 3.7–7.9 years, from when the manufacturer starts work, for such hardware to displace other accelerators in frontier development.",
        "theme": "access-governance",
        "blocked_by": null,
        "sources": [
          "S-1204"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0009",
        "n": 2,
        "historical": false,
        "text": "State-level attackers who hold the hardware can likely compromise the best current secure enclosures.",
        "theme": "hardware-trust",
        "blocked_by": "M-0017",
        "sources": [
          "S-1204",
          "S-0057"
        ],
        "inProposal": false
      },
      {
        "mech": "M-0009",
        "n": 3,
        "historical": false,
        "text": "Rival states would need to trust the design and manufacture of guarantee processors and enclosures, for example through open design, redundant processors from each side or oversight of production.",
        "theme": "hardware-trust",
        "blocked_by": null,
        "sources": [
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          "S-0035"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0009",
        "n": 4,
        "historical": false,
        "text": "Restricting future rule updates would need a formal language for rules, which the authors judge most likely infeasible for early flexHEG versions.",
        "theme": "protocol-soundness",
        "blocked_by": null,
        "sources": [
          "S-0035"
        ],
        "inProposal": null
      },
      {
        "mech": "M-0009",
        "n": 5,
        "historical": false,
        "text": "Governing all relevant chips depends on knowing where they are, through chip registries and detection of undeclared facilities.",
        "theme": "coverage-hidden-compute",
        "blocked_by": "M-0019",
        "sources": [
          "S-1205"
        ],
        "inProposal": false
      }
    ]
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    },
    "io": {
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        {
          "id": "I-0016",
          "title": "Batch-invariant inference kernels (Thinking Machines)",
          "url": "https://trustbutveri.fyi/implementations/batch-invariant-inference-kernels/"
        },
        {
          "id": "I-0015",
          "title": "Verde and RepOps (Gensyn)",
          "url": "https://trustbutveri.fyi/implementations/gensyn-verde-repops/"
        },
        {
          "id": "I-0012",
          "title": "Low-trust AI compute verification system overview",
          "url": "https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/"
        }
      ]
    },
    {
      "mechanism": "M-0010",
      "selected": null,
      "implementations": []
    },
    {
      "mechanism": "M-0009",
      "selected": null,
      "implementations": []
    }
  ],
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    {
      "id": "S-0020",
      "title": "Bit-Exact AI Inference Verification Without Performance Tradeoffs",
      "authors": "N. Cankaya",
      "year": 2026,
      "url": "https://arxiv.org/abs/2606.00279",
      "path": "/sources/cankaya-bit-exact-inference-verification/"
    },
    {
      "id": "S-1009",
      "title": "Defeating Nondeterminism in LLM Inference",
      "authors": "H. He & Thinking Machines Lab",
      "year": 2025,
      "url": "https://thinkingmachines.ai/blog/defeating-nondeterminism-in-llm-inference/",
      "path": "/sources/he-defeating-nondeterminism-llm-inference/"
    },
    {
      "id": "S-1010",
      "title": "Hawkeye: Reproducing GPU-Level Non-Determinism",
      "authors": "E. Badash et al.",
      "year": 2026,
      "url": "https://proceedings.mlsys.org/paper_files/paper/2026/hash/e217c271a57c365a246b0ad39e668ba8-Abstract-Conference.html",
      "path": "/sources/badash-hawkeye/"
    },
    {
      "id": "S-1012",
      "title": "Towards Deterministic Inference in SGLang and Reproducible RL Training",
      "authors": "The SGLang Team",
      "year": 2025,
      "url": "https://www.lmsys.org/blog/2025-09-22-sglang-deterministic/",
      "path": "/sources/sglang-deterministic-inference/"
    },
    {
      "id": "S-1013",
      "title": "Batch Invariance (vLLM documentation)",
      "authors": "vLLM project",
      "year": 2026,
      "url": "https://github.com/vllm-project/vllm/blob/main/docs/features/batch_invariance.md",
      "path": "/sources/vllm-batch-invariance-docs/"
    },
    {
      "id": "S-1812",
      "title": "gensyn-ai/ree: Gensyn Reproducible Execution Environment (GitHub repository)",
      "authors": "Gensyn",
      "year": 2026,
      "url": "https://github.com/gensyn-ai/ree",
      "path": "/sources/gensyn-ree-code/"
    },
    {
      "id": "S-3021",
      "title": "EigenCloud Brings Verifiable AI to Mass Market with EigenAI and EigenCompute Launches",
      "authors": "EigenCloud",
      "year": 2025,
      "url": "https://www.eigenlabs.org/blog/eigencloud-brings-verifiable-ai-to-mass-market-with-eigenai-and-eigencompute-launches/",
      "path": "/sources/eigencloud-eigenai-launch/"
    },
    {
      "id": "S-3022",
      "title": "Building Delphi: Pricing, Settlement, and Agentic Trading",
      "authors": "D. Jedamski",
      "year": 2026,
      "url": "https://www.gensyn.ai/blog/building-delphi-pricing-settlement-and-agentic-trading",
      "path": "/sources/gensyn-building-delphi/"
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    {
      "id": "S-3023",
      "title": "Reproducible Execution Environment (REE) (Gensyn documentation)",
      "authors": "Gensyn",
      "year": 2026,
      "url": "https://docs.gensyn.ai/tech",
      "path": "/sources/gensyn-ree-docs/"
    },
    {
      "id": "S-0075",
      "title": "What is Delphi? (Delphi documentation)",
      "authors": "Gensyn",
      "year": 2026,
      "url": "https://docs.delphi.fyi/",
      "path": "/sources/gensyn-delphi-documentation/"
    },
    {
      "id": "S-0018",
      "title": "A System Overview for Near-Term, Low-Trust AI Compute Verification",
      "authors": "N. Cankaya",
      "year": 2026,
      "url": "https://intelligence.org/wp-content/uploads/2026/06/A-system-overview-for-near-term-low-trust-AI-compute-verification.pdf",
      "path": "/sources/cankaya-system-overview-low-trust-compute-verification/"
    },
    {
      "id": "S-0033",
      "title": "Timing and Memory Telemetry on GPUs for AI Governance",
      "authors": "S. K. Monfared et al.",
      "year": 2026,
      "url": "https://arxiv.org/abs/2602.09369",
      "path": "/sources/monfared-timing-memory-telemetry-gpus/"
    },
    {
      "id": "S-0034",
      "title": "Guaranteeable Memory: An HBM-Based Chiplet for Verifiable AI Workloads",
      "authors": "J. Petrie",
      "year": 2025,
      "url": "https://openreview.net/forum?id=uc79kOv0MV",
      "path": "/sources/petrie-guaranteeable-memory/"
    },
    {
      "id": "S-0037",
      "title": "Detecting Hidden ML Training With Zero-Overhead Telemetry",
      "authors": "R. Rahman & S. Tajdari",
      "year": 2026,
      "url": "https://arxiv.org/abs/2606.19262",
      "path": "/sources/rahman-detecting-hidden-ml-training/"
    },
    {
      "id": "S-0014",
      "title": "On TEEs for Privacy-Preserving Monitoring in AI Governance",
      "authors": "Gloria Z",
      "year": 2026,
      "url": "https://techgov.intelligence.org/blog/on-tees-for-privacy-preserving-monitoring-in-ai-governance",
      "path": "/sources/zhao-tees-privacy-preserving-monitoring/"
    },
    {
      "id": "S-1200",
      "title": "NVIDIA Secure AI with Blackwell and Hopper GPUs (White Paper)",
      "authors": "NVIDIA",
      "year": 2025,
      "url": "https://docs.nvidia.com/nvidia-secure-ai-with-blackwell-and-hopper-gpus-whitepaper.pdf",
      "path": "/sources/nvidia-secure-ai-blackwell-hopper-whitepaper/"
    },
    {
      "id": "S-0035",
      "title": "Flexible Hardware-Enabled Guarantees for AI Compute",
      "authors": "J. Petrie et al.",
      "year": 2025,
      "url": "https://arxiv.org/abs/2506.15093",
      "path": "/sources/petrie-flexible-hardware-enabled-guarantees/"
    },
    {
      "id": "S-1204",
      "title": "Technical Options for Flexible Hardware-Enabled Guarantees",
      "authors": "J. Petrie & O. Aarne",
      "year": 2025,
      "url": "https://arxiv.org/abs/2506.03409",
      "path": "/sources/petrie-technical-options-flexheg/"
    },
    {
      "id": "S-1205",
      "title": "International Security Applications of Flexible Hardware-Enabled Guarantees",
      "authors": "O. Aarne & J. Petrie",
      "year": 2025,
      "url": "https://arxiv.org/abs/2506.15100",
      "path": "/sources/aarne-international-security-applications-flexheg/"
    },
    {
      "id": "S-0057",
      "title": "Hardware-Enabled Governance Mechanisms: Developing Technical Solutions to Exempt Items Otherwise Classified Under Export Control Classification Numbers 3A090 and 4A090",
      "authors": "G. Kulp et al.",
      "year": 2024,
      "url": "https://www.rand.org/pubs/working_papers/WRA3056-1.html",
      "path": "/sources/kulp-hardware-enabled-governance-mechanisms/"
    },
    {
      "id": "S-0056",
      "title": "Secure, Governable Chips: Using On-Chip Mechanisms to Manage National Security Risks from AI & Advanced Computing",
      "authors": "O. Aarne et al.",
      "year": 2024,
      "url": "https://www.cnas.org/publications/reports/secure-governable-chips",
      "path": "/sources/aarne-secure-governable-chips/"
    },
    {
      "id": "S-0006",
      "title": "Hardware-Enabled Mechanisms for Verifying Responsible AI Development",
      "authors": "A. O'Gara et al.",
      "year": 2025,
      "url": "https://arxiv.org/abs/2505.03742",
      "path": "/sources/ogara-hardware-enabled-verifying-responsible-ai/"
    },
    {
      "id": "S-1814",
      "title": "[Feature]: Batch Invariant Feature and Performance Optimization (vLLM issue #27433)",
      "authors": "vLLM project contributors",
      "year": 2025,
      "url": "https://github.com/vllm-project/vllm/issues/27433",
      "path": "/sources/vllm-batch-invariance-tracking-issue/"
    },
    {
      "id": "S-1008",
      "title": "AI 2040 Plan A — Verification SITREP",
      "authors": "Amodo Design",
      "year": 2026,
      "url": "https://amododesign.com/ai-verification/plan-a-sitrep/",
      "path": "/sources/amodo-plan-a-verification-sitrep/"
    }
  ]
}