# AI verification proposal

A proposal built with the Proposal Explorer of the AI Verification Tech Map (https://trustbutveri.fyi/), from its records of 2026-10-08. Interactive version: https://trustbutveri.fyi/explorer/?mechanisms=M-0015&implementations=M-0015:I-0012

How to read it: a claim is something one party wants to verify about another's AI hardware or software. A mechanism is a general technique for verifying claims; it is "aimed at" a claim when that is its direct purpose, and "supporting" when it contributes without being aimed at it. A claim is addressed when a mechanism in the proposal is aimed at it and is not excluded by the filters; addressed does not mean verified, so check that mechanism's readiness and open flaws. Readiness levels R0 to R4 describe one record's public evidence for its assessed use and are never combined. Definitions: https://trustbutveri.fyi/about/methodology/ (roles, properties and flaws) and https://trustbutveri.fyi/about/readiness/ (readiness levels).

## Filters

Filters apply to mechanisms only and describe the setting the proposal is for.

None set. Every mechanism on the map was available.

## Overview

One row per mechanism, read from its record. Open flaws: critical / significant / minor. The last three columns are the editors' reading of what the verifier sees.

| Mechanism | Readiness | Prover | Attack testing | Hardware | Open flaws | Weights | Inputs and outputs | Training data |
| --- | --- | --- | --- | --- | --- | --- | --- | --- |
| Memory wiping and proofs of secure erasure / Low-trust AI compute verification system overview | R1 | Adversarial | Analysis | Retrofit device | 0 / 2 / 1 | unspecified | unspecified | unspecified |

## Claims

No claims chosen.

## Mechanisms

### Memory wiping and proofs of secure erasure

A retrofittable reference design in which network taps commit to all facility traffic, and air-gapped, independently sourced checkers later re-run randomly challenged records. ([Memory wiping and proofs of secure erasure](https://trustbutveri.fyi/mechanisms/memory-wiping-and-secure-erasure/))

- Assessment: selected implementation [Low-trust AI compute verification system overview](https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/).
- Readiness: R1 Proposed, assessed for screening challenged records to show declared inference compute is not training.
- Claims in this proposal: none of them.
- Threat model: adversarial prover. Hardware: retrofit device. Prover cooperation: required. Attack testing: analysis. Category: Isolation & system architectures.
- What the verifier sees: model weights unspecified; inputs and outputs unspecified; training data unspecified. This Explorer has no asset-specific exposure assessment for this implementation. Check its source and deployment assumptions.


## Properties

**Built for an adversarial prover**

- Memory wiping and proofs of secure erasure


## Attack testing

Published attempts to break a system, including those that found failures. Testing history does not establish that open flaws are resolved.

**Testing history**

- Memory wiping and proofs of secure erasure / Low-trust AI compute verification system overview: Analysis


## Limits

**Open significant flaws**

- Mismatches cannot be attributed to cheating or error (theoretical argument, in Low-trust AI compute verification system overview; https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/#flaw-1) [1]. A failed hash or replay does not show whether it came from an evasion attempt, a random bit flip or an evaluation error. The author notes that if detected anomalies can plausibly be waved off as malfunctions, deterrence becomes less effective, so the parties need an agreed escalation procedure that ends in attribution.
- Inspector agents may be manipulable (open question, in Low-trust AI compute verification system overview; https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/#flaw-3) [1]. Automated compliance screening with LLM-based inspector agents must resist prompt-injection attacks. Adversarially trained systems might hide malicious actions with steganography, which makes backdoor detection an open problem.

**Family finding context**

- Context for Low-trust AI compute verification system overview; applicability depends on the finding's scope. Memory the wipe cannot reach (open question, in Memory wiping and proofs of secure erasure; https://trustbutveri.fyi/mechanisms/memory-wiping-and-secure-erasure/#flaw-1) [3][4]. Amodo's inventory of a GB200 system lists many memory stores beyond GPU HBM and host DRAM. It notes that SSD controller DRAM sits on a private bus that host commands cannot read or write, and that its optimized algorithm leaves 25 GiB of HBM unattested. It also asks how switch memory could be wiped.
- Context for Low-trust AI compute verification system overview; applicability depends on the finding's scope. Outside help during challenges (theoretical argument, in Memory wiping and proofs of secure erasure; https://trustbutveri.fyi/mechanisms/memory-wiping-and-secure-erasure/#flaw-2) [1][5]. Classic proofs of secure erasure assume the device is isolated during the protocol. Bursuc et al. relax this to a bound on how close a helper can be, enforced by round-trip times. In data centres, remote memory access has round trips of about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview therefore says verification depends on ruling out RDMA by latency or physical disconnection.

  Related mechanism: Timed challenge-response and memory-occupation challenges (R2, not in the proposal). Timed challenges bound how far away a helper can be by how quickly it must answer.

  Related mechanism: Bandwidth limits and compartmentalization (R2, not in the proposal). Removing or capping links between groups of accelerators limits remote memory access during a challenge.
- Context for Low-trust AI compute verification system overview; applicability depends on the finding's scope. Gap between erased and total memory (theoretical argument, in Memory wiping and proofs of secure erasure; https://trustbutveri.fyi/mechanisms/memory-wiping-and-secure-erasure/#flaw-3) [5]. Bursuc et al. note that memory left between the erased region and the device's full memory could hold data, and that their bounds are tighter only against a restricted adversary.

**Open minor flaws**

- Deliberate faults leak a bit each (theoretical argument, in Low-trust AI compute verification system overview; https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/#flaw-2) [1]. A malicious device can leak one bit by deliberately outputting a wrong result, which blocks a disclosure when the cross-comparison fails. The design therefore needs a pre-agreed budget of tolerated faults.

**Not yet demonstrated**

- Memory wiping and proofs of secure erasure: R1 Proposed, assessed for screening challenged records to show declared inference compute is not training


## Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open flaw or a dependency. Pointers, not recommendations: each brings its own readiness level and flaws, and none is claimed to close a flaw.

- **Deterministic and bit-exact inference** (R3 In production, assessed for reproducing open-model inference from receipts in Gensyn's information-market service)
  - Memory wiping and proofs of secure erasure waits on it: Exact replay needs complete hardware and software metadata, and the tolerable slowdown from emulation is an open question.
- **Tamper evidence for verifier devices** (R2 Demonstrated, assessed for detecting probing of proposed verifier hardware, using server and electronics prototypes as evidence)
  - Memory wiping and proofs of secure erasure waits on it: Tamper-evident, rapidly mass-manufacturable and retrofittable enclosures for side-channel defence are an open research question, and physical security against covert communication in every monitored data centre is challenging.
- **Timed challenge-response and memory-occupation challenges** (R2 Demonstrated, assessed for detecting whether a GPU is doing other work)
  - Memory wiping and proofs of secure erasure waits on it: Distinguishing one server's DRAM contents from another's by challenge-response timing, and a general challenge-response protocol for diverse data types, are open.
- **Network taps and certifiers** (R1 Proposed, assessed for committing a complete record of cluster traffic, so declared inference can be checked)
  - Memory wiping and proofs of secure erasure waits on it: Empirical feasibility of passive optical splitting at 53–112 GBaud under realistic conditions is an open question.
- **Side-channel suppression for isolated facilities** (R1 Proposed, assessed for bounding physical covert channels out of a verified enclosure)
  - Memory wiping and proofs of secure erasure waits on it: A mass-manufacturable, good-enough side-channel defence, particularly power-line filtering, has not been constructed or red-teamed.


## Dependencies

**Missing prerequisites**

- Network taps and certifiers (R1 Proposed, assessed for committing a complete record of cluster traffic, so declared inference can be checked), needed by Memory wiping and proofs of secure erasure
- Deterministic and bit-exact inference (R3 In production, assessed for reproducing open-model inference from receipts in Gensyn's information-market service), needed by Memory wiping and proofs of secure erasure

**Blockers**

- Memory wiping and proofs of secure erasure: Empirical feasibility of passive optical splitting at 53–112 GBaud under realistic conditions is an open question. (performance & compatibility; waits on Network taps and certifiers) [1]
- Memory wiping and proofs of secure erasure: Exact replay needs complete hardware and software metadata, and the tolerable slowdown from emulation is an open question. (performance & compatibility; waits on Deterministic and bit-exact inference) [1]
- Memory wiping and proofs of secure erasure: Tamper-evident, rapidly mass-manufacturable and retrofittable enclosures for side-channel defence are an open research question, and physical security against covert communication in every monitored data centre is challenging. (hardware trust; waits on Tamper evidence for verifier devices) [1]
- Memory wiping and proofs of secure erasure: A mass-manufacturable, good-enough side-channel defence, particularly power-line filtering, has not been constructed or red-teamed. (coverage & hidden compute; waits on Side-channel suppression for isolated facilities) [1]
- Memory wiping and proofs of secure erasure: Distinguishing one server's DRAM contents from another's by challenge-response timing, and a general challenge-response protocol for diverse data types, are open. (coverage & hidden compute; waits on Timed challenge-response and memory-occupation challenges) [1]
- Memory wiping and proofs of secure erasure: The threat model is under-developed and needs input from cybersecurity and AI threat-modelling experts. (adversarial validation) [1]


## What the verifier sees

- Model weights: shown by none; depends on the design for none; hidden by none; not involved in none; unspecified for Memory wiping and proofs of secure erasure.
- Inputs and outputs: shown by none; depends on the design for none; hidden by none; not involved in none; unspecified for Memory wiping and proofs of secure erasure.
- Training data: shown by none; depends on the design for none; hidden by none; not involved in none; unspecified for Memory wiping and proofs of secure erasure.

## Implementations

- Memory wiping and proofs of secure erasure: [AI 2040 inference-only verification stack](https://trustbutveri.fyi/implementations/ai-2040-inference-only-verification-plan/) (R1, proposed architecture); [Low-trust AI compute verification system overview](https://trustbutveri.fyi/implementations/low-trust-compute-verification-system-overview/) (R1, proposed architecture)

## Sources

1. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). https://intelligence.org/wp-content/uploads/2026/06/A-system-overview-for-near-term-low-trust-AI-compute-verification.pdf
2. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). https://arxiv.org/abs/2606.10724
3. Memory Wipes - Performance Analysis, Amodo Design (2026). https://amododesign.com/notes/2026-07-01-memory-wiping/
4. Improving Disk Wiping Speed for Memory Wipes, Amodo Design (2026). https://amododesign.com/notes/2026-09-14-disk-wiping-speed/
5. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). https://ieeexplore.ieee.org/document/10664348/