Proposal Explorer

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Operational use

• Operational use Sampled inference recomputation for checking untrusted workers' activations against the declared model, prompt and precision

Built for an adversarial prover

Timed challenge-response and memory-occupation challenges and Sampled inference recomputation

No new hardware needed

Timed challenge-response and memory-occupation challenges and Sampled inference recomputation

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

• Timed challenge-response and memory-occupation challenges, SAGE: Analysis
• Sampled inference recomputation: Analysis

Family findings

• Timed challenge-response and memory-occupation challenges

  Context for SAGE. Findings from the mechanism family appear here as context. They apply to an implementation only when its own record lists them, under the conditions stated there.

  • Timing-based software attestation has been broken in practice in Timed challenge-response and memory-occupation challenges

    Castelluccia et al. implemented two generic attacks, one based on a return-oriented rootkit and one on code compression, together with specific attacks on SWATT and ICE-based schemes, on commodity sensor nodes. They conclude that secure time-based attestation is "very difficult, if not impossible, to design correctly". The attacks target embedded schemes, not AI accelerators. ^{2 3}

    Response: Perrig and van Doorn, two of the designers of SWATT and ICE, replied in August 2010. They argue that the rootkit attack defeats a naive implementation, not a property the schemes claim, and that the SWATT attack was run on a re-implementation on a chip with eight times the program memory, where SWATT's own chip is almost always full of code. They accept that the attack on ICE works.

    Known failure · Demonstrated attack · Significant · Disputed. On the record

  • Remote memory narrows the timing margin in Timed challenge-response and memory-occupation challenges

    Data-centre remote memory access returns in about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview says verification of memory saturation depends on ruling out remote access by latency or physical disconnection. It names pre-staging data into local memory as the remaining evasion and proposes an unpredictable, capacity-filling challenge to close it. ⁴

    Known failure · Theoretical argument · Significant · Open. On the record

    Related mechanism Research demo Bandwidth limits and compartmentalization: Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced. A pointer, not evidence that this failure is mitigated. Add

  • Error rates not quantified in Timed challenge-response and memory-occupation challenges

    Monfared et al. show separable timing distributions. Their acceptance rule passes a GPU when its mean time per round stays at or below a chosen maximum, and an appendix outlines statistical tests for the proof-of-work puzzle. They leave hardware-specific threshold values to future work and report no false-positive or false-negative rates. ⁵

    Open question · Open question. On the record

Open significant failures

2 failures in 1 mechanism

• Tolerance for numerical noise leaves a covert channel in Sampled inference recomputation

  Schemes that accept approximate matches can put an upper bound on an adversary's covert bandwidth, but they cannot close the channel. The weight-exfiltration detector cut exfiltratable information to under 0.5%, not to zero, on a 30-billion-parameter mixture-of-experts model under benign prompt traffic. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token. Across six models, that cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target the check that outputs match the declared model. ^{6 14 17}

  Known failure · Demonstrated attack · Significant · Open. On the record

  Related mechanism Operational use Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration. A pointer, not evidence that this failure is mitigated. Add

• Some inference optimizations are not covered in Sampled inference recomputation

  TOPLOC's authors state that it cannot detect speculative decoding in which a cheaper model does the decoding. They did not test whether it distinguishes types of key-value (KV) cache compression. DiFR was evaluated only on sampling from a single model. Its authors sketch an extension to one speculative-decoding algorithm but do not test it. ^{7 8}

  Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations

• Self-modifying code limits the timing margin in SAGE

  The authors report that their implementation reaches 75% of maximum GPU utilisation when the checksum uses self-modifying code, and that this limits the time difference caused by an adversary who inserts instructions into the checksum loop. They note that other cache-eviction strategies could raise utilisation. ¹

  Scope limitation · Open question. On the record

• Only recorded traffic is checked in Sampled inference recomputation

  Recomputation checks that recorded, declared workloads are correct. It cannot show that the record is complete. The published schemes do not cover hidden workloads run on the same compute, or substituted work. Rinberg et al. say their exfiltration-detection scheme cannot stand alone. ^{6 18}

  Scope limitation · Theoretical argument. On the record

  Related mechanism Proposed Network taps and certifiers: Taps copy and hash all traffic on the monitored links, which bears on whether the traffic record is complete. They do not show what else ran on the same chips. A pointer, not evidence that this failure is mitigated. Add

Open minor failures

1 mechanism with minor failures

• Mixed hardware widens the honest baseline in Sampled inference recomputation

  When honest reference runs span different GPU types, the spread of benign scores grows. In DiFR's tests on Qwen3-30B-A3B, pooling A100 and H200 runs left Token-DiFR unable to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy separated them. Matched provider and verifier environments, or pooling that weights rare large deviations, restored detection. ⁷

  Known failure · Open question · Minor · Open. On the record

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• Operational use Deterministic and bit-exact inference Add
  • Bears on the open significant failure “Tolerance for numerical noise leaves a covert channel” in Sampled inference recomputation. Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration.
• Proposed Network taps and certifiers Add
  • Sampled inference recomputation waits on it. In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface.

Blockers

7 blockers recorded

• Timed challenge-response and memory-occupation challenges
  • The verifier must know the exact hardware configuration of the GPU. Hardware trust ¹
  • The verifier runs in an SGX enclave on the same host as the GPU, so the scheme inherits trust in that enclave. Hardware trust ¹
• Sampled inference recomputation
  • In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface. Coverage & hidden compute. Waits on Network taps and certifiers ^{13 19}
  • In retrofit designs, the recomputation server must sit inside the prover's data centre, possibly under the prover's physical control, and still be protected from a compromised provider, which Amodo rates 'not on track'. Hardware trust ^{6 13}
  • No independent red-team of a recomputation consistency check has been published (the one independent attack study targets the weight-exfiltration bound), and Amodo rates recomputation red-teaming 'not started'. Adversarial validation ^{13 14}
  • Tolerance-based checks need calibration on trusted hardware and exact knowledge of the provider's sampling procedure, and in one prototype a sampling-implementation mismatch produced large spurious differences. Performance & compatibility ^{7 12}
  • The verifier needs the model weights, so checking a closed-weights model requires a trusted, confidential recomputation environment, which the retrofit designs place inside the prover's facility. Privacy & leakage ^{4 7 18}

From the family or selected implementation's record. ?

Model weights

Depends on the design for Sampled inference recomputation.

Unspecified for Timed challenge-response and memory-occupation challenges. Check the implementation record.

Inputs and outputs

Depends on the design for Sampled inference recomputation.

Unspecified for Timed challenge-response and memory-occupation challenges. Check the implementation record.

Training data

Not involved: Sampled inference recomputation.

Unspecified for Timed challenge-response and memory-occupation challenges. Check the implementation record.

Timed challenge-response and memory-occupation challenges

• Proposed Data-centre memory challenging Proposed architecture, Machine Intelligence Research Institute
• Research demo GPU contention probes Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Research demo SAGE Research prototype
• Research demo VRAM-residency challenge Research prototype

Sampled inference recomputation

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Research demo DiFR (Divergence From Reference) Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)
• Operational use TOPLOC Open-source project, Prime Intellect

1. SAGE: Software-based Attestation for GPU Execution, A. Ivanov et al. (2023). Original
2. On the Difficulty of Software-Based Attestation of Embedded Devices, C. Castelluccia et al. (2009). Original
3. Refutation of "On the Difficulty of Software-Based Attestation of Embedded Devices", A. Perrig & L. van Doorn (2010). Original
4. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
5. Timing and Memory Telemetry on GPUs for AI Governance, S. K. Monfared et al. (2026). Original
6. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
7. DiFR: Inference Verification Despite Nondeterminism, A. Karvonen et al. (2025). Original
8. TOPLOC: A Locality Sensitive Hashing Scheme for Trustless Verifiable Inference, J. M. Ong et al. (2025). Original
9. PrimeIntellect-ai/toploc (GitHub repository), Prime Intellect (2025). Original
10. INTELLECT-2: A Reasoning Model Trained Through Globally Decentralized Reinforcement Learning, Prime Intellect Team et al. (2025). Original
11. adamkarvonen/difr (GitHub repository), A. Karvonen (2025). Original
12. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
13. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
14. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
15. SYNTHETIC-2 Release: Four Million Collaboratively Generated Reasoning Traces, Prime Intellect (2025). Original
16. An Inference Verification Prototype — Stage 1, Amodo Design (2026). Original
17. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
18. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
19. Verification Plan, R. Dean (2026). Original