Memory wiping and proofs of secure erasure

Memory wiping verifiably overwrites a device's memory, so that data from earlier work cannot persist where the wipe reaches.

In AI verification, periodic wipes would help show that only verified outputs carry forward. The technique builds on proofs of secure erasure: the device fills its memory with data derived from a verifier's seed, then answers timed questions about it. The theory is peer-reviewed.

Extrapolating from fill benchmarks on CPUs, GPUs and disks, Amodo Design estimates about 43 minutes to fill one GB200 tray's RAM and GPU memory and about 2.5 hours for an NVL72 rack's storage. As of September 2026 no end-to-end wipe with timed challenges has been published for data-centre hardware.

The main obstacles are wipe time and memory the wipe cannot reach, such as drive-controller DRAM. The largest known weakness is that the guarantee depends on ruling out outside help during challenges, which fast data-centre networks make harder.

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How it works

Proofs of secure erasure (PoSE), introduced by Perito and Tsudik for low-cost embedded devices, rely on the bounded memory of such devices 2. A verifier confirms that a device has erased its memory by having it fill that memory with data the verifier can check 3. Perito and Tsudik found this "particularly well-suited" to secure code update and to secure memory or storage erasure 2.

Bursuc et al.'s protocols have three phases 3:

  1. Fill. The prover fills its memory. In the simplest version the verifier sends random data; in graph-based versions it sends a short seed, and the device computes a large set of hash-chained labels from it 3.
  2. Challenge. The verifier asks for randomly chosen blocks, several times, and times each answer 3.
  3. Decide. The verifier accepts only if every answer is correct and arrived within the time bound 3.

The graph construction makes it slow to recompute any missing label, so a device that tried to keep other data must fail the deadline 3 5.

In AI verification, the AI 2040 plan proposes "periodic memory wiping on the inference units (which we think can be done through forced memorization)" 1. The MIRI system overview describes the same step: incompressible data is loaded until the device is full, and then random samples are challenged 4. Amodo Design generates the fill on the device from a verifier seed, following Bursuc et al. 5.

Reuter and colleagues specify erasure requirements for Pod-PoComp, a proposed protocol that uses compartmentalization to constrain frontier training 9. The developer and auditor agree on a memory target and a bound on state that may survive each wipe. An erasure certificate is valid only if the pod answers a fresh challenge in time, the agreed target is covered, and gateway records show no unexplained restore traffic 9.

What it establishes

Amodo Design describes the goal as a verifier ensuring "the prover has fully overwritten its memory, with no information persisted across the wipe" 5. Amodo says wipes help to verify the "completeness" of declared workloads 5. In the AI 2040 plan they help ensure that the only persisting results are verified inference outputs 1; see inference-only use.

Wipes limit what can carry over between verification cycles, not what runs between them. The AI 2040 plan therefore pairs them with network taps and partial recomputation (Network taps and certifiers, Sampled inference recomputation) 1. Amodo notes that all stores must be wiped at the same time, because otherwise "an attacker could simply move the data between the disks" 5.

In Pod-PoComp, unwipable state must be attested as fixed and included in the initial commitment, or charged to the residual-state bound R. State restored after a wipe must enter through a gateway. It is charged as uncommitted input unless already included in the initial commitment 9. This guarantee depends on the hardware, timing and communication assumptions. The erasure certificate bounds surviving state. The compute bound comes separately from pod capacity and the erasure schedule 9.

Unrecorded restore traffic is covered only by an assumed side-channel budget B. A deployment that cannot justify that bound fails the paper's erasure assumption 9.

Threat model

  • Bounded memory. Perito and Tsudik assume bounded memory and a small read-only memory 2.
  • Distant helpers. Earlier software protocols assumed the device was isolated during the protocol 3. Bursuc et al. relax this: helpers may exist but must be far enough away that their round-trip times exceed the deadline 3.
  • Round-trip time. Amodo Design assumes a 1 ms round-trip time, "expected to be a safe overestimate" 5.
  • No remote memory. The MIRI system overview says verification depends on ruling out remote memory access, "either via response latency or physical disconnection" 4.

Timed challenges are covered in Timed challenge-response and memory-occupation challenges.

Implementations

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