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A verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0003,M-0015&chips=existing&tested=analysis

Claims

Mechanisms2

Filters:×× 22 of 25 match · Clear

Analysis

Overview

Columns Claims Prover Attack testing Hardware Verifier sees
MechanismDevelopmentSecurity evidenceOpen failures
Whole-workload recomputation (reproducible packets) ⚠ ProposedNo published adversarial analysis recordednone
Memory wiping and proofs of secure erasure ProposedPublished security analysis1
  • Open failures: n critical n significant n minor
  • ⚠ Dimmed: excluded by your filters; point at ⚠ for the reason
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

Properties1 built for an adversarial prover
Built for an adversarial prover
Memory wiping and proofs of secure erasure
Not counted
Excluded by your filters: Whole-workload recomputation (reproducible packets)
Attack testing1 mechanism with published testing

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

Limits3 scope limitations · 1 open question · 1 excluded by filters · 2 not yet demonstrated · 1 mechanism with open significant failures
Excluded by your filters
Open significant failures
1 failure in 1 mechanism
  • Outside help during challenges in Memory wiping and proofs of secure erasure

    Classic proofs of secure erasure assume the device is isolated during the protocol. Bursuc et al. relax this to a bound on how close a helper can be, enforced by round-trip times. In data centres, remote memory access has round trips of about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview therefore says verification depends on ruling out RDMA by latency or physical disconnection. 8 9

    Known failure · Theoretical argument · Significant · Open. On the record

    Related mechanism Research demo Timed challenge-response and memory-occupation challenges: Timed challenges bound how far away a helper can be by how quickly it must answer. A pointer, not evidence that this failure is mitigated. Add

    Related mechanism Research demo Bandwidth limits and compartmentalization: Removing or capping links between groups of accelerators limits remote memory access during a challenge. A pointer, not evidence that this failure is mitigated. Add

Scope limitations
  • Spare compute is outside the scheme in Whole-workload recomputation (reproducible packets)

    The plan states that it does not verify that spare compute is not used for unapproved workloads, because this seems very challenging. Recomputation checks the correctness of declared work, not its completeness. 1 2

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Proofs of useful work for capacity accounting: Proposed as one input to accounting for spare capacity on declared hardware. A pointer, not evidence that this failure is mitigated. Add

  • Memory the wipe cannot reach in Memory wiping and proofs of secure erasure

    Amodo's inventory of a GB200 system lists many memory stores beyond GPU HBM and host DRAM. It notes that SSD controller DRAM sits on a private bus that host commands cannot read or write, and that its optimized algorithm leaves 25 GiB of HBM unattested. It also asks how switch memory could be wiped. 10 11

    Scope limitation · Open question. On the record

  • Gap between erased and total memory in Memory wiping and proofs of secure erasure

    Bursuc et al. note that memory left between the erased region and the device's full memory could hold data, and that their bounds are tighter only against a restricted adversary. 8

    Scope limitation · Theoretical argument. On the record

Open questions
  • Non-compliant work could be encoded inside compliant-looking packets in Whole-workload recomputation (reproducible packets)

    The plan notes that an AI company might try to encode a non-compliant workload inside a workload that looks compliant on the surface. 1

    Open question · Theoretical argument. On the record

Possible additions2 for open failures · 3 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

Dependencies3 missing prerequisites · 7 blockers
Missing prerequisites
Blockers
7 blockers recorded
  • Whole-workload recomputation (reproducible packets)
    • Workloads are not reproducible by default, and achieving reproducibility may cost performance. Performance & compatibility. Waits on Deterministic and bit-exact inference 1
    • Network packets are not individually reproducible by default; making them so may need considerable software, firmware and hardware work. Amodo rates this 'not on track'. Performance & compatibility 4
    • All traffic must reach the recomputation server via network taps, and the server's integrity is critical. Hardware trust. Waits on Network taps and certifiers 1 4
    • Recomputing training steps needs checkpoints: writing one at every step would cost more than 100% overhead, so Amodo's design needs a spare data-parallel replica that tracks the weights instead. Performance & compatibility 2
  • Memory wiping and proofs of secure erasure
    • Wipes take time: tens of minutes for a pod's volatile memory and hours for SSDs, displacing work. Performance & compatibility 9 10 11
    • Timed challenges must exclude remote memory and other helpers. Coverage & hidden compute. Waits on Timed challenge-response and memory-occupation challenges 8 9
    • All memory stores in a system must be inventoried and wiped at the same time. Coverage & hidden compute 10
What the verifier sees1 depend on design

From the family or selected implementation's record.

Exposure notes
Implementations2 systems
Whole-workload recomputation (reproducible packets)
Memory wiping and proofs of secure erasure
Sources13 cited
  1. Verification Plan, R. Dean (2026). Original
  2. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
  3. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
  4. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
  5. Get Involved in Verification, AI Futures Project (2026). Original
  6. Proof-of-Learning is Currently More Broken Than You Think, C. Fang et al. (2023). Original
  7. Secure Code Update for Embedded Devices via Proofs of Secure Erasure, D. Perito & G. Tsudik (2010). Original
  8. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). Original
  9. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
  10. Memory Wipes - Performance Analysis, Amodo Design (2026). Original
  11. Improving Disk Wiping Speed for Memory Wipes, Amodo Design (2026). Original
  12. Amodo-Design/PoSE-Memory-Wiping (GitHub repository), Amodo Design (2026). Original
  13. Empirical Evaluation of Memory-Erasure Protocols, R. Gil-Pons et al. (2025). Original

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Filter mechanisms

Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.

22 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum development status

Development status

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.

All claims

Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.

Start from a published design

Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.

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