Proposal Explorer
ResetA verification proposal from the AI Verification Tech Map, from its records of 2026-10-08. https://trustbutveri.fyi/explorer/?mechanisms=M-0007,M-0024,M-0019&chips=existing
Analysis
Applied filters: Chips: Existing chips only. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Minimum readiness, Attack testing, Keep hidden from the verifier.
Overview
| Mechanism | Readiness | Open flaws |
|---|---|---|
| Proofs of useful work for capacity accounting | R1 | 3 significant |
| Bounding unexplained information in outputs | R2 | 4 significant |
| Chip registries and manufacturing records | R1 | 3 significant |
- Open flaws: n critical n significant n minor
Claim coverageNo claims yet
Add claims to see which ones the mechanisms address.
Properties2 built for an adversarial prover
- Built for an adversarial prover
- Proofs of useful work for capacity accounting and Bounding unexplained information in outputs
- No new hardware needed
- Proofs of useful work for capacity accounting and Chip registries and manufacturing records
Attack testing3 mechanisms with published testing
Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.
- Proofs of useful work for capacity accounting: Analysis
- Bounding unexplained information in outputs: Independent red-team
- Chip registries and manufacturing records: Analysis
Limits2 not yet demonstrated · 3 mechanisms with open significant findings
- Open significant flaws
10 flaws in 3 mechanisms
Proves that work was done, not that no capacity remains in Proofs of useful work for capacity accounting
Proof-of-work accounting bounds unmonitored compute only relative to an estimate of what the actor has. Attestable states that the verifier "needs a credible estimate of the compute available" to the actor, and that a proof "cannot discover a datacenter that was never declared". 1
Theoretical argument · Significant · Open. On the record
Related mechanism R1 Chip registries and manufacturing records: A registry of chips is one basis for the estimate of available compute that the flaw's source says the verifier needs. A pointer, not evidence that this flaw is mitigated. In the proposal.
Related mechanism R1 Remote detection of data centres: Looks for data centres that were never declared, which a proof cannot discover. A pointer, not evidence that this flaw is mitigated. Add
Security rests on new hardness assumptions in Proofs of useful work for capacity accounting
Komargodski and Weinstein base security on hardness assumptions about batches of low-rank random linear equations, and list PoUW "from more standard or well-studied assumptions" as an open problem. Pearl's floating-point variant introduces a further "quantized-subspace hardness" assumption. 3 4
Open question · Significant · Open. On the record
Known shortcuts let a miner claim somewhat more work than it did in Proofs of useful work for capacity accounting
Pearl's specification lists known mining speedups: crafted inputs, precision shortcuts, seed grinding, work reuse, and faster kernels or hardware. A policy check caps the summands a miner may skip at one-sixteenth of those in a tile. For capacity bounding, any gap between work proven and work possible leaves spare capacity. 4
Theoretical argument · Significant · Open. On the record
Prompt-controlled entropy inflation widens the covert channel in Bounding unexplained information in outputs
Gumbel-based inference verification tolerates token choices that honest GPU nondeterminism could produce, and the size of that tolerated set grows with the model's output entropy. Kezins, an independent researcher, showed that an adversary who controls the prompt distribution can raise output entropy and roughly double the bits leaked per token. Across six models of 1 to 32 billion parameters, this cut the slowdown from 146–254 times under benign prompts to 60–118 times. Kezins argues that architectures built on the same unexplained-information bound inherit this attack surface, and recommends calibrating tolerances against local token entropy rather than benign traffic. 7 8
Demonstrated attack · Significant · Open. On the record
Related mechanism R3 Deterministic and bit-exact inference: Bit-exact replay would remove the tolerance for numerical noise that sets the size of this channel. The record notes that it needs full hardware and software metadata. A pointer, not evidence that this flaw is mitigated. Add
Information the declared computation explains is not bounded in Bounding unexplained information in outputs
The bound limits unexplained bits only. Outputs that the declared computation fully explains can still carry valuable information: a compression study notes that an adversary with inference access can extract more proprietary information per bit than naive transmission allows. 6 9
Theoretical argument · Significant · Open. On the record
Channels other than checked outputs are outside the bound in Bounding unexplained information in outputs
The inference-verification scheme treats side channels as out of scope. A low-trust system design argues that suppressing physical covert bandwidth below kilobits per second is much more achievable than aiming for zero, and that a malicious device can leak one bit of information by deliberately outputting a wrong result. 7 10
Theoretical argument · Significant · Open. On the record
Related mechanism R1 Side-channel suppression for isolated facilities: Physical side channels need separate suppression, which is this mechanism's purpose. A pointer, not evidence that this flaw is mitigated. Add
The facility-level design is untested in Bounding unexplained information in outputs
The compute-verification architecture is described with protocol details, potential attacks and prototyping plans, but no prototype results have been published. 6
Open question · Significant · Open. On the record
Records cover only chips that were recorded in Chip registries and manufacturing records
A registry or commitment accounts only for chips entered into it. Cankaya asks how a verifier would know it had found all chips, or how much "dark compute" remains, and notes that a fraudulent original record would mean unregistered chips had been made in advance. Halstead and Larsen propose reconstructing earlier production by auditing upstream suppliers. 13 15
Theoretical argument · Significant · Open. On the record
Related mechanism R1 Remote detection of data centres: Looks for large data centres that were never declared, which a registry cannot show. A pointer, not evidence that this flaw is mitigated. Add
Documents and serial numbers can be forged in Chip registries and manufacturing records
Avellar and Grunewald note that export documents can be forged, that companies can hide information behind obscure corporate structures, and that it may be possible to forge serial numbers on chips and racks. They recommend cryptographic attestation of a powered-on chip as an extra check. 12
Theoretical argument · Significant · Open. On the record
Insiders could alter records before they are fixed in Chip registries and manufacturing records
Cankaya argues that insiders who can photograph process secrets could also tamper with production records. A commitment makes changes after publication detectable, but it cannot show that the records were accurate when committed. 13
Theoretical argument · Significant · Open. On the record
- Not yet demonstrated
- R1 Proofs of useful work for capacity accounting and R1 Chip registries and manufacturing records
Possible additions3 for open flaws · 5 for dependencies
Mechanisms on the map that are not in the proposal. Pointers, not recommendations.
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- Bears on the open significant flaw “Prompt-controlled entropy inflation widens the covert channel” in Bounding unexplained information in outputs. Bit-exact replay would remove the tolerance for numerical noise that sets the size of this channel. The record notes that it needs full hardware and software metadata.
- Bounding unexplained information in outputs waits on it. Tolerance for numerical nondeterminism sets the size of the residual channel; bit-exact replay would remove it but needs full hardware and software metadata.
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- Bears on the open significant flaw “Proves that work was done, not that no capacity remains” in Proofs of useful work for capacity accounting. Looks for data centres that were never declared, which a proof cannot discover.
- Bears on the open significant flaw “Records cover only chips that were recorded” in Chip registries and manufacturing records. Looks for large data centres that were never declared, which a registry cannot show.
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- Bears on the open significant flaw “Channels other than checked outputs are outside the bound” in Bounding unexplained information in outputs. Physical side channels need separate suppression, which is this mechanism's purpose.
- Bounding unexplained information in outputs waits on it. Physical side channels need separate suppression, and one design treats a low residual bandwidth, rather than zero, as the realistic target.
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- Bounding unexplained information in outputs waits on it. The prover's compute must be isolated so that all traffic passes through the verifier's interlock; any unmonitored path voids the bound.
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- Bounding unexplained information in outputs depends on it.
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- Bounding unexplained information in outputs depends on it.
Dependencies4 missing prerequisites · 11 blockers
- Missing prerequisites
- R3 Sampled inference recomputation needed by Bounding unexplained information in outputs Add
- R2 Bandwidth limits and compartmentalization needed by Bounding unexplained information in outputs Add
- R1 Side-channel suppression for isolated facilities needed by Bounding unexplained information in outputs Add
- R1 Network taps and certifiers needed by Bounding unexplained information in outputs Add
- Blockers
11 blockers recorded
- Proofs of useful work for capacity accounting
- Bounding spare capacity needs a credible estimate of the compute available to the actor, including third-party access. Capacity bounds 1
- Proofs of work cannot find facilities that were never declared. Coverage & hidden compute 1
- As of September 2026 no implementation, demonstration or independent evaluation of proofs of work for capacity bounding has been published. Adversarial validation
- Bounding unexplained information in outputs
- The prover's compute must be isolated so that all traffic passes through the verifier's interlock; any unmonitored path voids the bound. Coverage & hidden compute. Waits on Bandwidth limits and compartmentalization 6
- Physical side channels need separate suppression, and one design treats a low residual bandwidth, rather than zero, as the realistic target. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities 7 10
- Tolerance for numerical nondeterminism sets the size of the residual channel; bit-exact replay would remove it but needs full hardware and software metadata. Protocol soundness. Waits on Deterministic and bit-exact inference 8 10
- Recomputation over confidential weights and inputs needs a protected setting: prover recomputation in a verifier-controlled enclosure, verifier recomputation in a prover-controlled enclosure, or zero-knowledge proofs. Privacy & leakage 6
- No prototype of the facility-level architecture exists to red-team. Adversarial validation 6
- Chip registries and manufacturing records
- No AI chip registry operates, and covering re-exports would need cooperation from re-exporters and foreign governments that may not be feasible everywhere. Access & governance 11 12
- Linking records to physical chips needs hard-to-spoof unique IDs and inspections. Hardware trust 11 12 13
- Chips produced before a registry starts must be reconstructed from supplier records. Coverage & hidden compute 13 15
- Proofs of useful work for capacity accounting
What the verifier sees2 depend on design
From the family or selected implementation's record.
- Model weights
Depends on the design for Proofs of useful work for capacity accounting and Bounding unexplained information in outputs.
Not involved: Chip registries and manufacturing records.
- Inputs and outputs
Depends on the design for Proofs of useful work for capacity accounting and Bounding unexplained information in outputs.
Not involved: Chip registries and manufacturing records.
- Training data
Not involved: Proofs of useful work for capacity accounting, Bounding unexplained information in outputs and Chip registries and manufacturing records.
Exposure notes
- Proofs of useful work for capacity accounting: Checking a sampled tile of a matrix multiplication reveals that tile, which may hold model or input data; the authors suggest a zero-knowledge proof when the matrices must stay private.
- Bounding unexplained information in outputs: Depends on where recomputation runs: in a sealed enclosure, or with zero-knowledge proofs, the verifier need not see the weights or the traffic.
- Chip registries and manufacturing records: Records chip identities and owners; it does not handle model data.
Implementations1 system
- Proofs of useful work for capacity accounting
- R3 Pearl proof-of-useful-work blockchain Open-source project, Pearl Research Labs
- Bounding unexplained information in outputs
- None on the map
- Chip registries and manufacturing records
- None on the map
Sources15 cited
- Pacing AI Requires Proof, Attestable (2026). Original
- Mechanisms to Verify International Agreements About AI Development, A. Scher & L. Thiergart (2025). Original
- Proofs of Useful Work from Arbitrary Matrix Multiplication, I. Komargodski & O. Weinstein (2025). Original
- Pearl Floating Point Scheme Specification, Pearl Research Team (2026). Original
- pearl: Monorepo for the Pearl network, Pearl Research Labs (2026). Original
- Verifying AI Compute by Bounding Unexplained Information Exfiltration, J. Petrie & Y. Mühlhäuser (2026). Original
- Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
- Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
- Haiku to Opus in Just 10 bits: LLMs Unlock Large Compression Gains, R. Rinberg et al. (2026). Original
- A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
- Verifying International Agreements on AI: Six Layers of Verification for Rules on Large-Scale AI Development and Deployment, M. Baker et al. (2025). Original
- Near-Term Verification Methods for AI Chip Exports, B. Avellar & E. Grunewald (2026). Original
- TSMC most definitely has a golden record of all AI chips it made, N. Cankaya (2025). Original
- Hardware-Level Governance of AI Compute: A Feasibility Taxonomy for Regulatory Compliance and Treaty Verification, S. Ansari (2026). Original
- Covert AI Projects, B. Halstead & T. Larsen (2026). Original
Share the link to this proposal. This proposal is also available as plain text and JSON.
Filter mechanisms
Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.
23 of 25 mechanisms match · Clear all
Prover
How far can the party being checked be trusted?
The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.
Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions
Verifier devices on site
May the verifier install its own hardware at the prover's sites?
Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.
"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions
Prover cooperation
How much must the prover take part?
Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.
"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions
Chips
May the proposal depend on new chip designs?
New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.
"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions
Minimum readiness
How mature must each mechanism be?
- Any (selected)23 match
- R1 Proposed23 match
- R2 Demonstrated15 match
- R3 In production4 match
- R4 Deployment-ready0 match
A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.
Keeps mechanisms whose readiness level is at least this one. Definitions
Attack testing
How hard has each mechanism been attacked in public?
The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.
Keeps mechanisms whose strongest published attack testing is at least this. Definitions
Keep hidden from the verifier
What must the verifier never see? Choose any.
Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.
Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.
Claims
A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.
- Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
- Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
- Unaddressed. No mechanism in the proposal addresses this claim.
Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, readiness, assumptions and open flaws.
Mechanisms
A mechanism is a general technique for verifying claims. Its badge is its readiness level for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.
- Aimed at the claim: verifying it is a direct purpose of the mechanism.
- Supports the claim: helps verify it without being aimed at it.
- Faint: excluded by your filters, so it does not count towards claim coverage.
Overview
One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Flaw counts are per mechanism. Summary counts name mechanisms with open findings, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context.
What the verifier sees
For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.
Possible additions
Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open flaw or a dependency. They are pointers, not recommendations: each brings its own readiness level and flaws, and none is claimed to close a flaw. Links from flaws are the editors' reading of the two records.
Start from a goal
A goal is something a rule or agreement about AI sets out to achieve. Choosing one loads the claims it needs verified. Your mechanisms and filters stay as they are.
- Cap frontier training2 direct, 3 supportingKeep every AI training run below an agreed amount of compute.
- Pause frontier AI development2 direct, 3 supportingStop new AI training runs and experiments for an agreed period, while existing models stay in service.
- Deploy only evaluated models2 direct, 3 supportingDeploy powerful AI models widely only after their risks have been evaluated and judged manageable.
- Prevent catastrophic misuse2 direct, 2 supportingKeep capable AI models from helping anyone carry out catastrophic attacks, such as biological or chemical ones.
- Prevent weight theft1 direct, 1 supportingKeep the weights of capable AI models from being copied out of the facilities that hold them.
- Enforce chip export controls1 directKeep export-controlled AI chips at the destinations they were authorised for.
Start from a published design
Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.
- AI 2040 inference-only verification stack7 mechanismsProposed architecture, AI Futures Project
- Low-trust AI compute verification system overview7 mechanismsProposed architecture, Machine Intelligence Research Institute
- RAND secure inference data center (SIDC) design3 mechanismsProposed architecture, RAND