Proposal Explorer

Add claims to see which ones the mechanisms address.

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Excluded by your filters: Network taps and certifiers and Tamper evidence for verifier devices

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

• Network taps and certifiers: Analysis · excluded by filters
• Tamper evidence for verifier devices: Analysis · excluded by filters

Excluded by your filters

• Network taps and certifiers Readiness R1 is below the minimum of R4.
• Tamper evidence for verifier devices Readiness R2 is below the minimum of R4.

Open significant flaws

8 flaws in 2 mechanisms

• Output nondeterminism leaves covert capacity in Network taps and certifiers

  Hashing cannot remove information hidden in the outputs themselves. The Secure Gateway Device paper estimates that about 0.1 bit per token remains even with seed-synchronized replay checks. For a 200k-GPU inference cluster at full load (2,000 tokens per GPU per second), that is about 40 Mbit/s of covert egress, enough to move a 1 TB model in under three days. The paper names this the core remaining challenge and points to deterministic replay or active scrubbing of hardware-induced entropy. An independent study found that an adversary who chooses the prompts roughly doubles the bits leaked per token under Gumbel-based inference verification; see Bounding unexplained information in outputs. ^{1 9}

  Theoretical argument · Significant · Open. On the record

  Related mechanism R3 Deterministic and bit-exact inference: Deterministic replay is one of the two remedies the flaw's source names. A pointer, not evidence that this flaw is mitigated. Add

  Related mechanism R2 Bounding unexplained information in outputs: Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict. A pointer, not evidence that this flaw is mitigated. Add

• Some links cannot be passively tapped in Network taps and certifiers

  Cankaya notes that copper-connected scale-up domains (for example NVL72 racks and TPU v7 cubes) are much harder to tap than fibre, and that optical budgets make passive taps impractical on 400GBASE-SR8 multimode links. Amodo found no taps advertised for 53 GBaud links as of May 2026. ^{2 10}

  Open question · Significant · Open. On the record

• Encrypted fabrics hide plaintext from both parties in Network taps and certifiers

  Cankaya notes that with TEE-protected sessions whose keys are ephemeral and managed inside the TEE, neither the operator nor the manufacturer can recover session keys after the session, so tapped traffic could not be opened for recomputation. For other encrypted fabrics, the operator can retain keys. ²

  Open question · Significant · Open. On the record

• Residual side channels in simple passive setups in Network taps and certifiers

  Amodo's analysis of its own tapped prototype lists unvalidated header fields, timing of permitted traffic and variation in response formatting as residual channels, and concludes that the passive tap must be replaced by an active one. ⁵

  Theoretical argument · Significant · Open. On the record

• Completeness rests on physical monitoring left out of scope in Network taps and certifiers

  The Secure Gateway Device paper assumes the facility is physically monitored, and states that the whole architecture depends on the device being the only communication channel. It names radio emanation, power-line signalling and thermal channels as covert channels beyond that scope. ¹

  Open question · Significant · Open. On the record

  Related mechanism R1 Side-channel suppression for isolated facilities: Addresses the radio, power-line and thermal channels that network-level designs leave out. A pointer, not evidence that this flaw is mitigated. Add

• Seals are often defeated with simple methods in Tamper evidence for verifier devices

  Published defeats of general security seals. They warn about proposed verifier-device seals, but do not demonstrate defeat of an AI verification enclosure or sensor.

  In 1996 a Los Alamos vulnerability assessment defeated all 94 security seals it examined, with 132 defeats in total, using rapid, inexpensive, low-tech methods. It found that seal cost did not predict security. In 2001 Johnston reported that high-tech seals are often easier to defeat than low-tech ones. ^{17 18}

  Demonstrated attack · Significant · Open · Mechanism-class evidence. On the record

• Security depends on inspection protocols in Tamper evidence for verifier devices

  An inspection and protocol requirement drawn from safeguards and enclosure studies, not a reported break of a deployed AI verifier.

  Johnston argues that a seal is no better than the protocols for using it, and that inspectors are usually given little useful information on how to detect tampering. The Sandia survey notes that larger enclosures are hard to inspect fully and that sensor data must be authenticated. ^{16 18}

  Theoretical argument · Significant · Open · Mechanism-class evidence. On the record

• Attack classes outside published models in Tamper evidence for verifier devices

  The radio compensation result is emulated using measured channel data under a known-reference attacker model. It is not a physical bypass demonstration against an AI verifier enclosure.

  The authors of the batteryless cover say they cannot assess chemical-solvent attacks, which exceed their expertise, and deem cover removal impractical. Anti-Tamper Radio's reference can drift as the environment or measurement system ages; the authors suggest gradually renewing the reference. A 2025 follow-up by some of the same authors shows, by emulation on measured channel data, that an attacker who knows the reference channel and the needle's effect on it could inject a signal that cancels the change caused by a needle insertion. It proposes a reconfigurable intelligent surface that randomizes the channel as a countermeasure. ^{11 12 19}

  Open question · Significant · Open · Mechanism-class evidence. On the record

Not yet demonstrated

R1 Network taps and certifiers

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• R3 Deterministic and bit-exact inference Add

  Excluded by filters: readiness R3

  • Bears on the open significant flaw “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Deterministic replay is one of the two remedies the flaw's source names.
  • Network taps and certifiers waits on it. Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove.
• R2 Bounding unexplained information in outputs Add

  Excluded by filters: readiness R2

  • Bears on the open significant flaw “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict.
• R1 Side-channel suppression for isolated facilities Add

  Excluded by filters: readiness R1

  • Bears on the open significant flaw “Completeness rests on physical monitoring left out of scope” in Network taps and certifiers. Addresses the radio, power-line and thermal channels that network-level designs leave out.
  • Network taps and certifiers waits on it. Radio, power-line and thermal channels are not addressed by network-level designs.
• R3 Sampled inference recomputation Add

  Excluded by filters: readiness R3

  • Network taps and certifiers depends on it.

Missing prerequisites

• R3 Sampled inference recomputation needed by Network taps and certifiers Add
• R3 Deterministic and bit-exact inference needed by Network taps and certifiers Add
• R1 Side-channel suppression for isolated facilities needed by Network taps and certifiers Add

Blockers

9 blockers recorded

• Network taps and certifiers
  • No complete verification tap has been demonstrated at production frontend link rates, and on the tested CPU no hash algorithm reached line rate with minimum-size frames. Performance & compatibility ^{10 20}
  • Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove. Evidence binding. Waits on Deterministic and bit-exact inference ¹
  • Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them. Hardware trust. Waits on Tamper evidence for verifier devices ^{1 3}
  • Radio, power-line and thermal channels are not addressed by network-level designs. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ¹
  • Red-teaming by specialists is called for but has not been reported. Adversarial validation ¹
• Tamper evidence for verifier devices
  • No tamper-evident enclosure has been designed for AI verifier hardware at retrofit scale. Hardware trust ³
  • Battery-backed designs add bulk, limit operating temperature (+10 °C to +35 °C for the IBM 4765) and complicate transport. Performance & compatibility ¹²
  • Active monitoring needs power, and visual inspection of large enclosures faces access limits. Access & governance ¹⁶
  • No evaluation has been published in the AI verification setting. Adversarial validation ³

From the family or selected implementation's record. ?

Model weights

Depends on the design for Network taps and certifiers.

Not involved: Tamper evidence for verifier devices.

Inputs and outputs

Depends on the design for Network taps and certifiers.

Not involved: Tamper evidence for verifier devices.

Training data

Depends on the design for Network taps and certifiers.

Not involved: Tamper evidence for verifier devices.

Network taps and certifiers

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• R1 Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• R1 SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)

Tamper evidence for verifier devices

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project

1. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). Original
2. The Fundamentals and Feasibility of Secure Network Taps for Verifying AI Datacenter Use, N. Cankaya (2026). Original
3. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
4. Verification Plan, R. Dean (2026). Original
5. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
6. Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
7. inference-verification: Inference Verification Prototype, Singapore AI Safety Hub (SASH) (2026). Original
8. Internationalising AI Verification, Singapore AI Safety Hub (SASH) (2026). Original
9. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
10. Network Tapping for AI Verification: A Technical Assessment, Amodo Design (2026). Original
11. Anti-Tamper Radio: System-Level Tamper Detection for Computing Systems, P. Staat et al. (2022). Original
12. Secure Physical Enclosures from Covers with Tamper-Resistance, V. Immler et al. (2019). Original
13. ImpedanceVerif: On-Chip Impedance Sensing for System-Level Tampering Detection, T. Mosavirik et al. (2023). Original
14. IBM 4765 Cryptographic Coprocessor Security Module: Security Policy, IBM Corporation (2012). Original
15. PHYSEC SEAL: Change detection for maximum safety, PHYSEC GmbH (2026). Original
16. Tamper-Indicating Enclosures, A Current Survey, H. A. Smartt & Z. N. Gastelum (2015). Original
17. Physical Security and Tamper-Indicating Devices, R. G. Johnston & A. R. E. Garcia (1996). Original
18. Tamper Detection for Safeguards and Treaty Monitoring: Fantasies, Realities, and Potentials, R. G. Johnston (2001). Original
19. Anti-Tamper Radio Meets Reconfigurable Intelligent Surface for System-Level Tamper Detection, M. S. Tabar et al. (2025). Original
20. Network Traffic Hashing, Amodo Design (2026). Original