Proposal Explorer

Add claims to see which ones the mechanisms address.

In production

• R3 Deterministic and bit-exact inference for reproducing open-model inference from receipts in Gensyn's information-market service

Built for an adversarial prover

Bounding unexplained information in outputs, Bandwidth limits and compartmentalization and Deterministic and bit-exact inference

No new hardware needed

Deterministic and bit-exact inference

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

• Bounding unexplained information in outputs: Independent red-team
• Bandwidth limits and compartmentalization: Analysis
• Deterministic and bit-exact inference: Analysis

Open significant flaws

10 flaws in 3 mechanisms

• Prompt-controlled entropy inflation widens the covert channel in Bounding unexplained information in outputs

  Gumbel-based inference verification tolerates token choices that honest GPU nondeterminism could produce, and the size of that tolerated set grows with the model's output entropy. Kezins, an independent researcher, showed that an adversary who controls the prompt distribution can raise output entropy and roughly double the bits leaked per token. Across six models of 1 to 32 billion parameters, this cut the slowdown from 146–254 times under benign prompts to 60–118 times. Kezins argues that architectures built on the same unexplained-information bound inherit this attack surface, and recommends calibrating tolerances against local token entropy rather than benign traffic. ^{2 3}

  Demonstrated attack · Significant · Open. On the record

  Related mechanism R3 Deterministic and bit-exact inference: Bit-exact replay would remove the tolerance for numerical noise that sets the size of this channel. The record notes that it needs full hardware and software metadata. A pointer, not evidence that this flaw is mitigated. In the proposal.

• Information the declared computation explains is not bounded in Bounding unexplained information in outputs

  The bound limits unexplained bits only. Outputs that the declared computation fully explains can still carry valuable information: a compression study notes that an adversary with inference access can extract more proprietary information per bit than naive transmission allows. ^{1 4}

  Theoretical argument · Significant · Open. On the record

• Channels other than checked outputs are outside the bound in Bounding unexplained information in outputs

  The inference-verification scheme treats side channels as out of scope. A low-trust system design argues that suppressing physical covert bandwidth below kilobits per second is much more achievable than aiming for zero, and that a malicious device can leak one bit of information by deliberately outputting a wrong result. ^{2 5}

  Theoretical argument · Significant · Open. On the record

  Related mechanism R1 Side-channel suppression for isolated facilities: Physical side channels need separate suppression, which is this mechanism's purpose. A pointer, not evidence that this flaw is mitigated. Add

• The facility-level design is untested in Bounding unexplained information in outputs

  The compute-verification architecture is described with protocol details, potential attacks and prototyping plans, but no prototype results have been published. ¹

  Open question · Significant · Open. On the record

• Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

  DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. ^{7 10 11}

  Theoretical argument · Significant · Open. On the record

• Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

  Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. ⁷

  Theoretical argument · Significant · Open. On the record

• Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

  More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. ⁷

  Theoretical argument · Significant · Open. On the record

• Training within one pod is not covered in Bandwidth limits and compartmentalization

  Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. ⁷

  Open question · Significant · Open. On the record

• Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

  In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. ⁹

  Theoretical argument · Significant · Open. On the record

• Cross-hardware replay relies on reverse-engineered, closed behaviour in Deterministic and bit-exact inference

  Emulating one GPU's rounding on another requires reverse-engineering tensor-core arithmetic and modelling proprietary kernel choices. Hawkeye covers a subset of NVIDIA architectures and states that attention and other higher-level operations need further reverse engineering. For the bit-exact emulator, a proprietary Hopper kernel family is an open edge case. ^{12 14}

  Open question · Significant · Open. On the record

Open minor flaws

1 mechanism with minor findings

• Some kernels remain genuinely nondeterministic in Deterministic and bit-exact inference

  The bit-exact work separates kernels that are deterministic but not batch-invariant from truly nondeterministic ones that use atomic functions. Some integer de-quantization kernels use atomic additions and remain nondeterministic, so exact replay needs backends that avoid them. ¹²

  Open question · Minor · Open. On the record

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• R1 Side-channel suppression for isolated facilities Add
  • Bears on the open significant flaw “Channels other than checked outputs are outside the bound” in Bounding unexplained information in outputs. Physical side channels need separate suppression, which is this mechanism's purpose.
  • Bounding unexplained information in outputs waits on it. Physical side channels need separate suppression, and one design treats a low residual bandwidth, rather than zero, as the realistic target.
• R2 Tamper evidence for verifier devices Add
  • Bandwidth limits and compartmentalization waits on it. Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU.
• R1 Network taps and certifiers Add
  • Bandwidth limits and compartmentalization waits on it. The verifier must know that all traffic leaving a pod crosses the capped, monitored links.
  • Bounding unexplained information in outputs depends on it.
• R3 Sampled inference recomputation Add
  • Bounding unexplained information in outputs depends on it.

Missing prerequisites

• R3 Sampled inference recomputation needed by Bounding unexplained information in outputs Add
• R1 Side-channel suppression for isolated facilities needed by Bounding unexplained information in outputs Add
• R1 Network taps and certifiers needed by Bounding unexplained information in outputs Add
• R2 Tamper evidence for verifier devices needed by Bandwidth limits and compartmentalization Add

Shared foundations

• Network taps and certifiers relied on by Bounding unexplained information in outputs and Bandwidth limits and compartmentalization

Blockers

13 blockers recorded

• Bounding unexplained information in outputs
  • The prover's compute must be isolated so that all traffic passes through the verifier's interlock; any unmonitored path voids the bound. Coverage & hidden compute. Waits on Bandwidth limits and compartmentalization ¹
  • Physical side channels need separate suppression, and one design treats a low residual bandwidth, rather than zero, as the realistic target. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ^{2 5}
  • Tolerance for numerical nondeterminism sets the size of the residual channel; bit-exact replay would remove it but needs full hardware and software metadata. Protocol soundness. Waits on Deterministic and bit-exact inference ^{3 5}
  • Recomputation over confidential weights and inputs needs a protected setting: prover recomputation in a verifier-controlled enclosure, verifier recomputation in a prover-controlled enclosure, or zero-knowledge proofs. Privacy & leakage ¹
  • No prototype of the facility-level architecture exists to red-team. Adversarial validation ¹
• Bandwidth limits and compartmentalization
  • No cap that a verifier can check has been implemented or red-teamed. Adversarial validation ⁷
  • The verifier must know that all traffic leaving a pod crosses the capped, monitored links. Coverage & hidden compute. Waits on Network taps and certifiers ⁵
  • Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU. Hardware trust. Waits on Tamper evidence for verifier devices ^{7 9}
  • Advances in low-communication training could shrink the margin that the cap enforces. Capacity bounds ^{7 10 11}
• Deterministic and bit-exact inference
  • Batch-invariant kernels cost throughput: in Thinking Machines' Qwen3-8B test, an improved deterministic build took 42 s against 26 s for vLLM's default, and SGLang reports an average 34.35% slowdown on its FlashInfer and FlashAttention 3 backends. Performance & compatibility ^{13 15}
  • Coverage is incomplete: the bit-exact emulator targets dense blocks on NVIDIA GPUs and excludes mixture-of-experts inference and training, and vLLM's batch-invariant mode is in beta, with open work on AMD hardware and speculative decoding. Performance & compatibility ^{12 16 22}
  • Amodo's status page for the AI 2040 verification plan rates a reproducible inference stack for that plan as 'not started'. Performance & compatibility ²³
  • Exact replay requires the prover to disclose weights, software versions, parallelism and batch sizes to whoever recomputes. Privacy & leakage ^{5 12}

From the family or selected implementation's record. ?

Model weights

Depends on the design for Bounding unexplained information in outputs and Deterministic and bit-exact inference.

Not involved: Bandwidth limits and compartmentalization.

Inputs and outputs

Depends on the design for Bounding unexplained information in outputs and Deterministic and bit-exact inference.

Not involved: Bandwidth limits and compartmentalization.

Training data

Not involved: Bounding unexplained information in outputs, Bandwidth limits and compartmentalization and Deterministic and bit-exact inference.

Bounding unexplained information in outputs

None on the map

Bandwidth limits and compartmentalization

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• R1 RAND secure inference data center (SIDC) design Proposed architecture, RAND

Deterministic and bit-exact inference

• R2 Batch-invariant inference kernels (Thinking Machines) Open-source project, Thinking Machines Lab
• R3 Verde and RepOps (Gensyn) Product, Gensyn
• R1 Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute

1. Verifying AI Compute by Bounding Unexplained Information Exfiltration, J. Petrie & Y. Mühlhäuser (2026). Original
2. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
3. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
4. Haiku to Opus in Just 10 bits: LLMs Unlock Large Compression Gains, R. Rinberg et al. (2026). Original
5. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
6. Verification Plan, R. Dean (2026). Original
7. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
8. De-risking Interconnect Limits for AI Verification, A. Scher et al. (2026). Original
9. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
10. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
11. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
12. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
13. Defeating Nondeterminism in LLM Inference, H. He & Thinking Machines Lab (2025). Original
14. Hawkeye: Reproducing GPU-Level Non-Determinism, E. Badash et al. (2026). Original
15. Towards Deterministic Inference in SGLang and Reproducible RL Training, The SGLang Team (2025). Original
16. Batch Invariance (vLLM documentation), vLLM project (2026). Original
17. gensyn-ai/ree: Gensyn Reproducible Execution Environment (GitHub repository), Gensyn (2026). Original
18. EigenCloud Brings Verifiable AI to Mass Market with EigenAI and EigenCompute Launches, EigenCloud (2025). Original
19. Building Delphi: Pricing, Settlement, and Agentic Trading, D. Jedamski (2026). Original
20. Reproducible Execution Environment (REE) (Gensyn documentation), Gensyn (2026). Original
21. What is Delphi? (Delphi documentation), Gensyn (2026). Original
22. [Feature]: Batch Invariant Feature and Performance Optimization (vLLM issue #27433), vLLM project contributors (2025). Original
23. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original