Proposal Explorer

Add claims to see which ones the mechanisms address.

Operational use

• Operational use Deterministic and bit-exact inference for reproducing open-model inference from receipts in Gensyn's information-market service

Built for an adversarial prover

Timed challenge-response and memory-occupation challenges and Deterministic and bit-exact inference

No new hardware needed

Timed challenge-response and memory-occupation challenges and Deterministic and bit-exact inference

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

• Timed challenge-response and memory-occupation challenges: Analysis
• Deterministic and bit-exact inference: Analysis

Open significant failures

1 failure in 1 mechanism

• Remote memory narrows the timing margin in Timed challenge-response and memory-occupation challenges

  Data-centre remote memory access returns in about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview says verification of memory saturation depends on ruling out remote access by latency or physical disconnection. It names pre-staging data into local memory as the remaining evasion and proposes an unpredictable, capacity-filling challenge to close it. ¹

  Known failure · Theoretical argument · Significant · Open. On the record

  Related mechanism Research demo Bandwidth limits and compartmentalization: Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced. A pointer, not evidence that this failure is mitigated. Add

Scope limitations

• Some kernels remain genuinely nondeterministic in Deterministic and bit-exact inference

  The bit-exact work separates kernels that are deterministic but not batch-invariant from truly nondeterministic ones that use atomic functions. Some integer de-quantization kernels use atomic additions and remain nondeterministic, so exact replay needs backends that avoid them. ¹¹

  Scope limitation · Open question. On the record

• Cross-hardware replay relies on reverse-engineered, closed behaviour in Deterministic and bit-exact inference

  Emulating one GPU's rounding on another requires reverse-engineering tensor-core arithmetic and modelling proprietary kernel choices. Hawkeye covers a subset of NVIDIA architectures and states that attention and other higher-level operations need further reverse engineering. For the bit-exact emulator, a proprietary Hopper kernel family is an open edge case. ^{11 13}

  Scope limitation · Open question. On the record

Open questions

• Error rates not quantified in Timed challenge-response and memory-occupation challenges

  Monfared et al. show separable timing distributions. Their acceptance rule passes a GPU when its mean time per round stays at or below a chosen maximum, and an appendix outlines statistical tests for the proof-of-work puzzle. They leave hardware-specific threshold values to future work and report no false-positive or false-negative rates. ³

  Open question · Open question. On the record

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• Research demo Bandwidth limits and compartmentalization Add
  • Bears on the open significant failure “Remote memory narrows the timing margin” in Timed challenge-response and memory-occupation challenges. Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced.
  • Timed challenge-response and memory-occupation challenges waits on it. Outside help, such as remote memory, must be excluded during challenges.

Blockers

7 blockers recorded

• Timed challenge-response and memory-occupation challenges
  • No network-level memory challenge across data-centre servers has been demonstrated. Adversarial validation ¹
  • Challenges that fill memory displace workloads; filling a pod's volatile memory takes tens of minutes and SSDs take hours. Performance & compatibility ^{1 3}
  • Outside help, such as remote memory, must be excluded during challenges. Coverage & hidden compute. Waits on Bandwidth limits and compartmentalization ¹
• Deterministic and bit-exact inference
  • Batch-invariant kernels cost throughput: in Thinking Machines' Qwen3-8B test, an improved deterministic build took 42 s against 26 s for vLLM's default, and SGLang reports an average 34.35% slowdown on its FlashInfer and FlashAttention 3 backends. Performance & compatibility ^{12 14}
  • Coverage is incomplete: the bit-exact emulator targets dense blocks on NVIDIA GPUs and excludes mixture-of-experts inference and training, and vLLM's batch-invariant mode is in beta, with open work on AMD hardware and speculative decoding. Performance & compatibility ^{11 15 21}
  • Amodo's status page for the AI 2040 verification plan rates a reproducible inference stack for that plan as 'not started'. Performance & compatibility ²²
  • Exact replay requires the prover to disclose weights, software versions, parallelism and batch sizes to whoever recomputes. Privacy & leakage ^{1 11}

From the family or selected implementation's record. ?

Model weights

Depends on the design for Deterministic and bit-exact inference.

Not involved: Timed challenge-response and memory-occupation challenges.

Inputs and outputs

Depends on the design for Deterministic and bit-exact inference.

Not involved: Timed challenge-response and memory-occupation challenges.

Training data

Not involved: Timed challenge-response and memory-occupation challenges and Deterministic and bit-exact inference.

Timed challenge-response and memory-occupation challenges

• Proposed Data-centre memory challenging Proposed architecture, Machine Intelligence Research Institute
• Research demo GPU contention probes Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Research demo SAGE Research prototype
• Research demo VRAM-residency challenge Research prototype

Deterministic and bit-exact inference

• Research demo Batch-invariant inference kernels (Thinking Machines) Open-source project, Thinking Machines Lab
• Operational use Verde and RepOps (Gensyn) Product, Gensyn
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute

1. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
2. Verification Plan, R. Dean (2026). Original
3. Timing and Memory Telemetry on GPUs for AI Governance, S. K. Monfared et al. (2026). Original
4. SAGE: Software-based Attestation for GPU Execution, A. Ivanov et al. (2023). Original
5. SWATT: SoftWare-based ATTestation for Embedded Devices, A. Seshadri et al. (2004). Original
6. Proofs of Space, S. Dziembowski et al. (2015). Original
7. Secure Code Update for Embedded Devices via Proofs of Secure Erasure, D. Perito & G. Tsudik (2010). Original
8. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). Original
9. On the Difficulty of Software-Based Attestation of Embedded Devices, C. Castelluccia et al. (2009). Original
10. Refutation of "On the Difficulty of Software-Based Attestation of Embedded Devices", A. Perrig & L. van Doorn (2010). Original
11. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
12. Defeating Nondeterminism in LLM Inference, H. He & Thinking Machines Lab (2025). Original
13. Hawkeye: Reproducing GPU-Level Non-Determinism, E. Badash et al. (2026). Original
14. Towards Deterministic Inference in SGLang and Reproducible RL Training, The SGLang Team (2025). Original
15. Batch Invariance (vLLM documentation), vLLM project (2026). Original
16. gensyn-ai/ree: Gensyn Reproducible Execution Environment (GitHub repository), Gensyn (2026). Original
17. EigenCloud Brings Verifiable AI to Mass Market with EigenAI and EigenCompute Launches, EigenCloud (2025). Original
18. Building Delphi: Pricing, Settlement, and Agentic Trading, D. Jedamski (2026). Original
19. Reproducible Execution Environment (REE) (Gensyn documentation), Gensyn (2026). Original
20. What is Delphi? (Delphi documentation), Gensyn (2026). Original
21. [Feature]: Batch Invariant Feature and Performance Optimization (vLLM issue #27433), vLLM project contributors (2025). Original
22. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original