Proposal Explorer

Reset

A verification proposal from the AI Verification Tech Map, from its records of 2026-10-08. https://trustbutveri.fyi/explorer/?mechanisms=M-0002,M-0014&tested=red-teamed&cols=prover,sees

Claims

Mechanisms2

Filters:× 7 of 25 match

Applied filters: Attack testing: Red-teamed. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum readiness, Keep hidden from the verifier.

Analysis

Applied filters: Attack testing: Red-teamed. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum readiness, Keep hidden from the verifier.

MechanismReadinessOpen flawsProverVerifier sees
Deterministic and bit-exact inference ⚠ excluded by your filters: attack testing: analysis R31 significant1 minorAdversarialW dependsI dependsT not involved
Bandwidth limits and compartmentalization ⚠ excluded by your filters: attack testing: analysis R25 significantAdversarialW not involvedI not involvedT not involved
  • Open flaws: n critical n significant n minor
  • Verifier sees model weights (W), inputs and outputs (I), training data (T): W shown W depends W hidden W not involved W unspecified
  • ⚠ Dimmed: excluded by your filters; point at ⚠ for the reason
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

PropertiesNone recorded
Attack testing2 mechanisms with published testing

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

Limits2 excluded by filters · 2 mechanisms with open significant findings
Excluded by your filters
Open significant flaws
6 flaws in 2 mechanisms
  • Cross-hardware replay relies on reverse-engineered, closed behaviour in Deterministic and bit-exact inference

    Emulating one GPU's rounding on another requires reverse-engineering tensor-core arithmetic and modelling proprietary kernel choices. Hawkeye covers a subset of NVIDIA architectures and states that attention and other higher-level operations need further reverse engineering. For the bit-exact emulator, a proprietary Hopper kernel family is an open edge case. 1 3

    Open question · Significant · Open. On the record

  • Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

    DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. 13 16 17

    Theoretical argument · Significant · Open. On the record

  • Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

    Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. 13

    Theoretical argument · Significant · Open. On the record

  • Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

    More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. 13

    Theoretical argument · Significant · Open. On the record

  • Training within one pod is not covered in Bandwidth limits and compartmentalization

    Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. 13

    Open question · Significant · Open. On the record

  • Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

    In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. 15

    Theoretical argument · Significant · Open. On the record

Open minor flaws
1 mechanism with minor findings
  • Some kernels remain genuinely nondeterministic in Deterministic and bit-exact inference

    The bit-exact work separates kernels that are deterministic but not batch-invariant from truly nondeterministic ones that use atomic functions. Some integer de-quantization kernels use atomic additions and remain nondeterministic, so exact replay needs backends that avoid them. 1

    Open question · Minor · Open. On the record

Possible additions2 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

  • Excluded by filters: attack testing: analysis

    • Bandwidth limits and compartmentalization waits on it. Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU.
  • Excluded by filters: attack testing: analysis

    • Bandwidth limits and compartmentalization waits on it. The verifier must know that all traffic leaving a pod crosses the capped, monitored links.
Dependencies1 missing prerequisite · 8 blockers
Missing prerequisites
Blockers
8 blockers recorded
  • Deterministic and bit-exact inference
    • Batch-invariant kernels cost throughput: in Thinking Machines' Qwen3-8B test, an improved deterministic build took 42 s against 26 s for vLLM's default, and SGLang reports an average 34.35% slowdown on its FlashInfer and FlashAttention 3 backends. Performance & compatibility 2 4
    • Coverage is incomplete: the bit-exact emulator targets dense blocks on NVIDIA GPUs and excludes mixture-of-experts inference and training, and vLLM's batch-invariant mode is in beta, with open work on AMD hardware and speculative decoding. Performance & compatibility 1 5 18
    • Amodo's status page for the AI 2040 verification plan rates a reproducible inference stack for that plan as 'not started'. Performance & compatibility 19
    • Exact replay requires the prover to disclose weights, software versions, parallelism and batch sizes to whoever recomputes. Privacy & leakage 1 11
  • Bandwidth limits and compartmentalization
    • No cap that a verifier can check has been implemented or red-teamed. Adversarial validation 13
    • The verifier must know that all traffic leaving a pod crosses the capped, monitored links. Coverage & hidden compute. Waits on Network taps and certifiers 11
    • Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU. Hardware trust. Waits on Tamper evidence for verifier devices 13 15
    • Advances in low-communication training could shrink the margin that the cap enforces. Capacity bounds 13 16 17
What the verifier sees1 depend on design

From the family or selected implementation's record.

Model weights

Depends on the design for Deterministic and bit-exact inference.

Not involved: Bandwidth limits and compartmentalization.

Inputs and outputs

Depends on the design for Deterministic and bit-exact inference.

Not involved: Bandwidth limits and compartmentalization.

Exposure notes
Implementations5 systems
Deterministic and bit-exact inference
Bandwidth limits and compartmentalization
Sources19 cited
  1. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
  2. Defeating Nondeterminism in LLM Inference, H. He & Thinking Machines Lab (2025). Original
  3. Hawkeye: Reproducing GPU-Level Non-Determinism, E. Badash et al. (2026). Original
  4. Towards Deterministic Inference in SGLang and Reproducible RL Training, The SGLang Team (2025). Original
  5. Batch Invariance (vLLM documentation), vLLM project (2026). Original
  6. gensyn-ai/ree: Gensyn Reproducible Execution Environment (GitHub repository), Gensyn (2026). Original
  7. EigenCloud Brings Verifiable AI to Mass Market with EigenAI and EigenCompute Launches, EigenCloud (2025). Original
  8. Building Delphi: Pricing, Settlement, and Agentic Trading, D. Jedamski (2026). Original
  9. Reproducible Execution Environment (REE) (Gensyn documentation), Gensyn (2026). Original
  10. What is Delphi? (Delphi documentation), Gensyn (2026). Original
  11. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
  12. Verification Plan, R. Dean (2026). Original
  13. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
  14. De-risking Interconnect Limits for AI Verification, A. Scher et al. (2026). Original
  15. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
  16. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
  17. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
  18. [Feature]: Batch Invariant Feature and Performance Optimization (vLLM issue #27433), vLLM project contributors (2025). Original
  19. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original

Share the link to this proposal. This proposal is also available as plain text and JSON.

Filter mechanisms

Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.

7 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum readiness

How mature must each mechanism be?

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, readiness, assumptions and open flaws.

All claims

Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its readiness level for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Flaw counts are per mechanism. Summary counts name mechanisms with open findings, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open flaw or a dependency. They are pointers, not recommendations: each brings its own readiness level and flaws, and none is claimed to close a flaw. Links from flaws are the editors' reading of the two records.

Start from a published design

Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.

Search

Full search page