Proposal Explorer
ResetA verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0023,M-0001&implementations=M-0001:I-0002&hide=training
Analysis
Applied filters: Keep hidden from the verifier: training data. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum development status, Attack testing.
Overview
| Mechanism | Development | Security evidence | Open failures |
|---|---|---|---|
| Safeguard attestation | Research demo | Published security analysis | 2 significant |
| Sampled inference recomputationDiFR (Divergence From Reference) | Research demo | Published security analysis | 1 significant1 minorFamily context below |
- Open failures: n critical n significant n minor
Claim coverageNo claims yet
Add claims to see which ones the mechanisms address.
Properties1 built for an adversarial prover
- Built for an adversarial prover
- Sampled inference recomputation
- No new hardware needed
- Safeguard attestation and Sampled inference recomputation
Attack testing2 mechanisms with published testing
Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.
- Safeguard attestation: Analysis
- Sampled inference recomputation, DiFR (Divergence From Reference): Analysis
Limits1 family with findings to check · 3 scope limitations · 1 open question · 2 mechanisms with open significant failures
- Family findings
- Sampled inference recomputation
Context for DiFR (Divergence From Reference). Findings from the mechanism family appear here as context. They apply to an implementation only when its own record lists them, under the conditions stated there.
Tolerance for numerical noise leaves a covert channel in Sampled inference recomputation
Schemes that accept approximate matches can put an upper bound on an adversary's covert bandwidth, but they cannot close the channel. The weight-exfiltration detector cut exfiltratable information to under 0.5%, not to zero, on a 30-billion-parameter mixture-of-experts model under benign prompt traffic. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token. Across six models, that cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target the check that outputs match the declared model. 15 20 22
Known failure · Demonstrated attack · Significant · Open. On the record
Related mechanism Operational use Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration. A pointer, not evidence that this failure is mitigated. Add
Only recorded traffic is checked in Sampled inference recomputation
Recomputation checks that recorded, declared workloads are correct. It cannot show that the record is complete. The published schemes do not cover hidden workloads run on the same compute, or substituted work. Rinberg et al. say their exfiltration-detection scheme cannot stand alone. 15 23
Scope limitation · Theoretical argument. On the record
Related mechanism Proposed Network taps and certifiers: Taps copy and hash all traffic on the monitored links, which bears on whether the traffic record is complete. They do not show what else ran on the same chips. A pointer, not evidence that this failure is mitigated. Add
Some inference optimizations are not covered in Sampled inference recomputation
TOPLOC's authors state that it cannot detect speculative decoding in which a cheaper model does the decoding. They did not test whether it distinguishes types of key-value (KV) cache compression. DiFR was evaluated only on sampling from a single model. Its authors sketch an extension to one speculative-decoding algorithm but do not test it. 14 24
Known failure · Theoretical argument · Significant · Open. On the record
Mixed hardware widens the honest baseline in Sampled inference recomputation
When honest reference runs span different GPU types, the spread of benign scores grows. In DiFR's tests on Qwen3-30B-A3B, pooling A100 and H200 runs left Token-DiFR unable to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy separated them. Matched provider and verifier environments, or pooling that weights rare large deviations, restored detection. 14
Known failure · Open question · Minor · Open. On the record
- Sampled inference recomputation
- Open significant failures
3 failures in 2 mechanisms
Components outside the attested boundary in Safeguard attestation
In the proof-of-guardrail experiments, the guardrail model and the agent's backend model were both reached through external APIs, and the authors leave the decision to trust those APIs to the verifier. The measured wrapper must also have no vulnerability that lets the unmeasured agent bypass the guardrail, for example by executing arbitrary commands inside the enclave. The code's README states that the enclave does not currently restrict the agent's arbitrary command execution, which could be used to bypass guardrails. 1 2
Known failure · Theoretical argument · Significant · Open. On the record
Memory-bus interposition extracts attestation keys and forges attestations in Safeguard attestation
Applies to variants using the affected Intel or AMD trust roots. PAL*M excludes physical attacks. A TDX-backed safeguard claim against a physical host attacker would be defeated, but these studies do not demonstrate a break of the AWS Nitro proof-of-guardrail prototype or of verifier-side recomputation.
The TEE findings cover DDR5 attacks on Intel TDX, the H100 relay demonstration, DDR4 attacks on AMD SEV-SNP, and software-only SEV-SNP forgery before AMD's fixes. These are inherited hardware limits; a governance analysis explains why physical access matters in a treaty setting. 1 4 7 8 9 10 11 12 13
Response: Intel and AMD place the physical attack class outside their threat models, according to the researchers. AMD reports firmware fixes for RMPocalypse.
Known failure · Demonstrated attack · Significant · Open · Inherited finding. On the record · Related finding in TEE remote attestation for AI workloads
Related mechanism Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors: A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically. A pointer, not evidence that this failure is mitigated. Add
Statistical tolerance leaves a covert channel in DiFR (Divergence From Reference)
Statistical schemes can put an upper bound on an adversary's covert bandwidth, but cannot close it. In the companion exfiltration study, the detector cut exfiltratable information to under 0.5% under benign prompt traffic. It did not cut it to zero. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study attacked that detector, which uses the same Gumbel-margin statistic. An adversary who controls the prompts roughly doubled the bits leaked per token. Across six models, this cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target DiFR's check that outputs match the declared configuration. 15 20 22
Known failure · Demonstrated attack · Significant · Open. On the record
- Scope limitations
Attestation shows a safeguard ran, not that it is effective in Safeguard attestation
Proof of guardrail ensures that the guardrail executed, but the guardrail can still err or be jailbroken. Because the guardrail must be open source, a malicious developer can attack it with jailbreaks while still presenting a valid proof. In the authors' evaluation, Llama Guard 3 reached an F1 score of 0.56 on the unsafe class of the ToxicChat dataset. The authors state that proof of guardrail should not be interpreted or advertised as proof of safety. 1
Scope limitation · Theoretical argument. On the record
Selective attestation leaves traffic uncovered in Safeguard attestation
Attestations are issued per response. In the prototype, the agent offers them when it receives high-stakes questions, so nothing shows that unattested traffic went through the same path. PAL*M's authors note that a prover could cherry-pick favourable executions, and suggest verifier-published nonces or requesting only session-level proofs. A governance analysis notes that auditors also need assurance that all activity is accounted for, since a host could start a second confidential virtual machine that bypasses monitoring. 1 4 9
Scope limitation · Theoretical argument. On the record
Related mechanism Research demo On-chip telemetry from timing, memory and performance counters: On-chip counters are a proposed route to evidence about everything a chip runs, including a second virtual machine that skips the safeguard. A pointer, not evidence that this failure is mitigated. Add
Measurements may omit behaviour-relevant configuration or runtime changes in Safeguard attestation
Every component that influences inference behaviour must be covered by the launch measurement, including feature flags, environment variables and invocation arguments. A launch measurement also does not show that a program keeps running as measured if the kernel is later compromised. 9
Scope limitation · Theoretical argument. On the record
- Open questions
Speculative decoding and multi-model sampling not evaluated in DiFR (Divergence From Reference)
The algorithms and experiments cover sampling from a single LLM. Speculative decoding was not evaluated. The authors sketch an extension to one speculative-decoding algorithm, without experiments. They note that other variants would need modified verification and extra metadata. 14
Open question · Open question. On the record
- Open minor failures
1 mechanism with minor failures
Mixed hardware widens the honest baseline in DiFR (Divergence From Reference)
For Qwen3-30B-A3B, pooling honest runs across A100 and H200 GPUs and parallelism setups broadened the honest score distribution. Token-DiFR then failed to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy did. The authors report that matched provider and verifier environments, or pooling that weights rare large deviations, restore detection. 14
Known failure · Open question · Minor · Open. On the record
Possible additions1 for open failures · 2 for dependencies
Mechanisms on the map that are not in the proposal. Pointers, not recommendations.
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- Bears on the open significant failure “Memory-bus interposition extracts attestation keys and forges attestations” in Safeguard attestation. A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically.
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- Safeguard attestation waits on it. Safeguard evidence must be bound to the model actually served, which depends on model-identity attestation.
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- Safeguard attestation waits on it. Frontier model inference typically needs several GPUs, GPU confidential computing is less mature than CPU support, and CPU inference, which an enclave prototype had to use, ran about 100 times slower than GPU inference.
- Safeguard attestation waits on it. Trust rests on a small number of hardware vendors, and a per-CPU Intel attestation key has been extracted by physical attack.
Dependencies2 missing prerequisites · 8 blockers
- Missing prerequisites
- Operational use TEE remote attestation for AI workloads needed by Safeguard attestation Add
- Operational use Hardware-attested weight binding needed by Safeguard attestation Add
- Blockers
8 blockers recorded
- Safeguard attestation
- No published design shows that all of a provider's traffic passes through the attested safeguard path; current evidence covers individual attested responses. Coverage & hidden compute 1 9
- Frontier model inference typically needs several GPUs, GPU confidential computing is less mature than CPU support, and CPU inference, which an enclave prototype had to use, ran about 100 times slower than GPU inference. Performance & compatibility. Waits on TEE remote attestation for AI workloads 9 25
- Trust rests on a small number of hardware vendors, and a per-CPU Intel attestation key has been extracted by physical attack. Hardware trust. Waits on TEE remote attestation for AI workloads 7 9
- Safeguard evidence must be bound to the model actually served, which depends on model-identity attestation. Evidence binding. Waits on Hardware-attested weight binding 25 26
- No independent red-team or audit of a safeguard-attestation system has been published, and the available prototypes are described by their authors as proofs of concept that have not been stress-tested by a counterparty. Adversarial validation 2 6
- Sampled inference recomputation
- The verifier needs the model weights, so outsiders cannot use the method to verify providers of closed-weights models. Privacy & leakage 14
- The verifier must know and match the provider's sampling procedure, and in one prototype a sampling mismatch in a newer vLLM version produced large spurious logit differences. Performance & compatibility 14 17
- No independent red-team of DiFR's consistency check has been published, Amodo rates recomputation red-teaming 'not started', and the one independent attack study targets an exfiltration detector built on the same statistic. Adversarial validation 19 20
- Safeguard attestation
What the verifier sees1 unspecified · 1 depend on design
From the family or selected implementation's record.
- Model weights
Depends on the design for Safeguard attestation.
Unspecified for Sampled inference recomputation. Check the implementation record.
- Inputs and outputs
Depends on the design for Safeguard attestation.
Unspecified for Sampled inference recomputation. Check the implementation record.
- Training data
Not involved: Safeguard attestation.
Unspecified for Sampled inference recomputation. Check the implementation record.
Exposure notes
- Safeguard attestation: The enclave route signs hashes of the safeguard, request and response; a low-trust design has the verifier re-run and screen sampled requests itself.
- Sampled inference recomputation, DiFR (Divergence From Reference): This Explorer has no asset-specific exposure assessment for this implementation. Check its source and deployment assumptions.
Implementations5 systems
- Safeguard attestation
- None on the map
- Sampled inference recomputation
- Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
- Research demo DiFR (Divergence From Reference) Research prototype
- Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
- Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)
- Operational use TOPLOC Open-source project, Prime Intellect
Sources26 cited
- Proof-of-Guardrail in AI Agents and What (Not) to Trust from It, X. Jin et al. (2026). Original
- Verifiable-ClawGuard: proof-of-guardrail reference code, SaharaLabsAI (2026). Original
- Safety Without Compromising on Privacy, D. McCann-Sayles et al. (2026). Original
- PAL*M: Property Attestation for Large Generative Models, P. Chantasantitam et al. (2026). Original
- Enabling Verifiably-Scoped Monitoring through Large Language Models and Trusted Compute, B. Penchas et al. (2026). Original
- Auditor-in-a-Box: Tools for Third-Party Auditing, R. Rinberg & B. Penchas (2026). Original
- TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition, J. Chuang et al. (2026). Original
- DDRop: Active Memory Interposer Attacks on Confidential VMs by Dropping DDR5 Writes, J. De Meulemeester et al. (2026). Original
- On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
- Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing, J. De Meulemeester et al. (2026). Original
- RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP, B. Schlüter & S. Shinde (2025). Original
- SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020), AMD (2025). Original
- A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
- DiFR: Inference Verification Despite Nondeterminism, A. Karvonen et al. (2025). Original
- Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
- adamkarvonen/difr (GitHub repository), A. Karvonen (2025). Original
- Scaling Recomputation Inference Verification, Amodo Design (2026). Original
- Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
- AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
- Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
- An Inference Verification Prototype — Stage 1, Amodo Design (2026). Original
- Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
- Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
- TOPLOC: A Locality Sensitive Hashing Scheme for Trustless Verifiable Inference, J. M. Ong et al. (2025). Original
- Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments, C. Schnabl et al. (2025). Original
- How Tinfoil Proves Exactly What Model Is Running, Tinfoil Team (2026). Original
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Filter mechanisms
Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.
24 of 25 mechanisms match · Clear all
Prover
How far can the party being checked be trusted?
The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.
Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions
Verifier devices on site
May the verifier install its own hardware at the prover's sites?
Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.
"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions
Prover cooperation
How much must the prover take part?
Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.
"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions
Chips
May the proposal depend on new chip designs?
New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.
"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions
Minimum development status
Development status
A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.
Keeps mechanisms whose readiness level is at least this one. Definitions
Attack testing
How hard has each mechanism been attacked in public?
The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.
Keeps mechanisms whose strongest published attack testing is at least this. Definitions
Keep hidden from the verifier
What must the verifier never see? Choose any.
Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.
Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.
Claims
A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.
- Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
- Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
- Unaddressed. No mechanism in the proposal addresses this claim.
Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.
Mechanisms
A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.
- Aimed at the claim: verifying it is a direct purpose of the mechanism.
- Supports the claim: helps verify it without being aimed at it.
- Faint: excluded by your filters, so it does not count towards claim coverage.
Overview
One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.
What the verifier sees
For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.
Possible additions
Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.
Start from a goal
A goal is something a rule or agreement about AI sets out to achieve. Choosing one loads the claims it needs verified. Your mechanisms and filters stay as they are.
- Cap frontier training2 direct, 3 supportingKeep every AI training run below an agreed amount of compute.
- Pause frontier AI development2 direct, 3 supportingStop new AI training runs and experiments for an agreed period, while existing models stay in service.
- Deploy only evaluated models2 direct, 3 supportingDeploy powerful AI models widely only after their risks have been evaluated and judged manageable.
- Prevent catastrophic misuse2 direct, 2 supportingKeep capable AI models from helping anyone carry out catastrophic attacks, such as biological or chemical ones.
- Prevent weight theft1 direct, 1 supportingKeep the weights of capable AI models from being copied out of the facilities that hold them.
- Enforce chip export controls1 directKeep export-controlled AI chips at the destinations they were authorised for.
Start from a published design
Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.
- AI 2040 inference-only verification stack7 mechanismsProposed architecture, AI Futures Project
- Low-trust AI compute verification system overview7 mechanismsProposed architecture, Machine Intelligence Research Institute
- RAND secure inference data center (SIDC) design2 mechanismsProposed architecture, RAND