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A verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0012,M-0019,M-0020&chips=existing&hide=weights

Claims

Mechanisms3

Filters:×× 22 of 25 match · Clear

Applied filters: Chips: Existing chips only; Keep hidden from the verifier: model weights. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Minimum development status, Attack testing.

Analysis

Applied filters: Chips: Existing chips only; Keep hidden from the verifier: model weights. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Minimum development status, Attack testing.

  • Open failures: n critical n significant n minor
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

Properties1 with operational use · 1 built for an adversarial prover
Operational use
Built for an adversarial prover
Remote detection of data centres
Failures since mitigated
  • Launch-state attestation does not by itself cover weights loaded later in Hardware-attested weight binding 1 11
Attack testing3 mechanisms with published testing

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

Limits1 mechanism with open critical failures · 5 scope limitations · 1 open question · 2 not yet demonstrated · 1 mechanism with open significant failures
Open critical failures
  • Underlying attestation can be forged or relayed in Hardware-attested weight binding

    Critical for weight binding against an operator with physical access to affected hardware, or with control of the hypervisor on an AMD SEV-SNP platform without AMD's fixes. PAL*M excludes physical attacks, and Tinfoil acknowledges this boundary.

    The enclave route inherits the platform-specific TEE attestation failures. Intel TDX forgery and H100 relay were demonstrated with physical access and host control. Battering RAM defeated AMD SEV-SNP attestation on DDR4 servers; RMPocalypse did so from malicious host software on platforms without AMD's fixes. These demonstrate failures of the trust roots, not of each model-commitment protocol. 2 3 7 8 9 10

    Response: The TEE.fail authors report that physical interposer attacks are outside Intel's and AMD's threat models. AMD reports fixes for RMPocalypse.

    Known failure · Demonstrated attack · Critical · Open · Inherited finding. On the record · Related finding in TEE remote attestation for AI workloads

    Related mechanism Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors: A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically. A pointer, not evidence that this failure is mitigated. Add

Open significant failures
1 failure in 1 mechanism
  • Documents and serial numbers can be forged in Chip registries and manufacturing records

    Avellar and Grunewald note that export documents can be forged, that companies can hide information behind obscure corporate structures, and that it may be possible to forge serial numbers on chips and racks. They recommend cryptographic attestation of a powered-on chip as an extra check. 14

    Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations
  • For private models, a user can confirm consistency but not content in Hardware-attested weight binding

    When weights are not published, users can check that the same root hash is served each time, but not what the model is. Pairing the hash with an attested evaluation, as in Attestable Audits, is one proposed remedy. 1 12

    Scope limitation · Open question. On the record

  • Records cover only chips that were recorded in Chip registries and manufacturing records

    A registry or commitment accounts only for chips entered into it. Cankaya asks how a verifier would know it had found all chips, or how much "dark compute" remains, and notes that a fraudulent original record would mean unregistered chips had been made in advance. Halstead and Larsen propose reconstructing earlier production by auditing upstream suppliers. 15 17

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Remote detection of data centres: Looks for large data centres that were never declared, which a registry cannot show. A pointer, not evidence that this failure is mitigated. In the proposal.

  • Insiders could alter records before they are fixed in Chip registries and manufacturing records

    Cankaya argues that insiders who can photograph process secrets could also tamper with production records. A commitment makes changes after publication detectable, but it cannot show that the records were accurate when committed. 15

    Scope limitation · Theoretical argument. On the record

  • Facilities can be disguised or hidden in Remote detection of data centres

    Halstead and Larsen discuss two ways to hide a facility. One is to disguise it as a legitimate industrial site. The other is to build it underground, with cooling that avoids visible heat plumes. They note that the underground option requires bespoke engineering. 17

    Scope limitation · Theoretical argument. On the record

  • Small sites may not be detectable in Remote detection of data centres

    Halstead and Larsen conclude that a sufficiently small covert project could not be ruled out with confidence. In their estimates, the chance of detection is lower for smaller sites. Krawec notes that small data centres in existing buildings may lack the distinctive features of large facilities. 17 18

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Chip registries and manufacturing records: Accounts for chips from the fab onwards, which does not depend on a site being visible. A pointer, not evidence that this failure is mitigated. In the proposal.

Open questions
  • Search for unknown sites is undemonstrated in Remote detection of data centres

    Krawec reports that telling data centres apart from other industrial facilities systematically is difficult. Automating detection would need large amounts of training imagery and a purpose-trained model. In Krawec's words, automated data-centre detection "remains primarily conceptual at present". 18

    Open question · Open question. On the record

Possible additions1 for open failures · 1 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

Dependencies1 missing prerequisite · 7 blockers
Missing prerequisites
Blockers
7 blockers recorded
  • Hardware-attested weight binding
    • Attestation that resists physical attackers, for the enclave variant. Hardware trust. Waits on TEE remote attestation for AI workloads 7
  • Chip registries and manufacturing records
    • No implementation of an AI chip registry has been publicly reported, and covering re-exports would need cooperation from re-exporters and foreign governments that may not be feasible everywhere. Access & governance 13 14
    • Linking records to physical chips needs hard-to-spoof unique IDs and inspections. Hardware trust 13 14 15
    • Chips produced before a registry starts must be reconstructed from supplier records. Coverage & hidden compute 15 17
  • Remote detection of data centres
    • Wide-area, automated detection of data centres is not yet practical and needs large training datasets. Coverage & hidden compute 18
    • No measured detection or false-alarm rates for finding undeclared facilities have been published. Adversarial validation 17 18
    • Recent high-resolution imagery is costly, is limited by weather and needs trained analysts. Access & governance 18
What the verifier sees1 unspecified

From the family or selected implementation's record.

Inputs and outputs

Not involved: Chip registries and manufacturing records and Remote detection of data centres.

Unspecified for Hardware-attested weight binding. Check the implementation record.

Exposure notes
Implementations3 systems
Hardware-attested weight binding
Chip registries and manufacturing records
None on the map
Remote detection of data centres
None on the map
Sources20 cited
  1. How Tinfoil Proves Exactly What Model Is Running, Tinfoil Team (2026). Original
  2. PAL*M: Property Attestation for Large Generative Models, P. Chantasantitam et al. (2026). Original
  3. A primer on secure enclaves, Tinfoil (2026). Original
  4. Backend infrastructure, Tinfoil (2026). Original
  5. How verification works in Tinfoil, Tinfoil (2026). Original
  6. modelwrap: Reproducible dm-verity read-only image of Huggingface models, Tinfoil (2026). Original
  7. TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition, J. Chuang et al. (2026). Original
  8. Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing, J. De Meulemeester et al. (2026). Original
  9. RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP, B. Schlüter & S. Shinde (2025). Original
  10. SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020), AMD (2025). Original
  11. On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
  12. Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments, C. Schnabl et al. (2025). Original
  13. Verifying International Agreements on AI: Six Layers of Verification for Rules on Large-Scale AI Development and Deployment, M. Baker et al. (2025). Original
  14. Near-Term Verification Methods for AI Chip Exports, B. Avellar & E. Grunewald (2026). Original
  15. TSMC most definitely has a golden record of all AI chips it made, N. Cankaya (2025). Original
  16. Hardware-Level Governance of AI Compute: A Feasibility Taxonomy for Regulatory Compliance and Treaty Verification, S. Ansari (2026). Original
  17. Covert AI Projects, B. Halstead & T. Larsen (2026). Original
  18. Tracking Hyperscale AI Data Center Growth with Satellite Imagery, C. Krawec (2026). Original
  19. Introducing the Frontier Data Centers Hub, Epoch AI (2025). Original
  20. AI Data Centers Documentation – Methodology, Epoch AI (2026). Original

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Filter mechanisms

Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.

22 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum development status

Development status

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.

All claims

Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.

Start from a published design

Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.

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