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A verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0009,M-0019&hide=weights,io&cols=prover,tested

Claims

Mechanisms2

Filters:× 23 of 25 match

Analysis

Overview

Columns Claims Prover Attack testing Hardware Verifier sees
MechanismDevelopmentSecurity evidenceOpen failuresProverAttack testing
Hardware-enabled guarantees (flexHEG) and guarantee processors ProposedPublished security analysis3AdversarialAnalysis
Chip registries and manufacturing records ProposedPublished security analysis1Semi-trustedAnalysis
  • Open failures: n critical n significant n minor
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

Properties1 built for an adversarial prover
Attack testing2 mechanisms with published testing

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

Limits4 scope limitations · 1 open question · 2 not yet demonstrated · 2 mechanisms with open significant failures
Open significant failures
4 failures in 2 mechanisms
  • State attackers can likely defeat current secure enclosures in Hardware-enabled guarantees (flexHEG) and guarantee processors

    The flexHEG authors write that "nation-state attackers can likely compromise the best current secure enclosures", and that the marginal cost of circumvention per device is hard to estimate. RAND similarly judges that anti-tamper measures "would not be insurmountable for a determined and well-resourced adversary", although they raise costs and can reveal tampering. 2 4

    Known failure · Theoretical argument · Significant · Open. On the record

  • Firmware-only retrofits rely on Secure Boot, which fault injection can bypass in Hardware-enabled guarantees (flexHEG) and guarantee processors

    Part II notes that the most common attack on Secure Boot replaces the firmware and applies a voltage glitch while the signature is being checked. It also notes that sophisticated actors may use microprobing or laser voltage probing to read key registers. 2

    Known failure · Theoretical argument · Significant · Open. On the record

  • FLOP accounting can be laundered through external data in Hardware-enabled guarantees (flexHEG) and guarantee processors

    Results of earlier or parallel workloads could be hidden in the "external data" fed to a device, which would falsify the total FLOP count unless the inputs are explained or time delays are imposed. 2

    Known failure · Theoretical argument · Significant · Open. On the record

  • Documents and serial numbers can be forged in Chip registries and manufacturing records

    Avellar and Grunewald note that export documents can be forged, that companies can hide information behind obscure corporate structures, and that it may be possible to forge serial numbers on chips and racks. They recommend cryptographic attestation of a powered-on chip as an extra check. 8

    Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations
  • Many important rules cannot be checked on-chip in Hardware-enabled guarantees (flexHEG) and guarantee processors

    Malicious intent "is not a technical property observable on-chip", and misuse depends on what is done with a computation's results. A guarantee processor cannot easily tell whether a network is the whole system or one expert in a mixture-of-experts system. Part III judges that a fully local ruleset "may not be entirely feasible" for the same reason. 1 3

    Scope limitation · Theoretical argument. On the record

  • Coverage stops at flexHEG-equipped chips in Hardware-enabled guarantees (flexHEG) and guarantee processors

    Motivated actors will always be able to use some compute that is not flexHEG-equipped. Recalling existing consumer GPUs would likely be impractical, and reaching perfect coverage, or conclusively proving that no secret government data centres exist, would be "practically quite difficult". 1 3

    Scope limitation · Open question. On the record

    Related mechanism Proposed Chip registries and manufacturing records: Accounts for which chips exist and who holds them. A pointer, not evidence that this failure is mitigated. In the proposal.

    Related mechanism Proposed Remote detection of data centres: Looks for undeclared facilities that hold other chips. A pointer, not evidence that this failure is mitigated. Add

  • Records cover only chips that were recorded in Chip registries and manufacturing records

    A registry or commitment accounts only for chips entered into it. Cankaya asks how a verifier would know it had found all chips, or how much "dark compute" remains, and notes that a fraudulent original record would mean unregistered chips had been made in advance. Halstead and Larsen propose reconstructing earlier production by auditing upstream suppliers. 9 11

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Remote detection of data centres: Looks for large data centres that were never declared, which a registry cannot show. A pointer, not evidence that this failure is mitigated. Add

  • Insiders could alter records before they are fixed in Chip registries and manufacturing records

    Cankaya argues that insiders who can photograph process secrets could also tamper with production records. A commitment makes changes after publication detectable, but it cannot show that the records were accurate when committed. 9

    Scope limitation · Theoretical argument. On the record

Open questions
  • Supply-chain diversion and hidden backdoors in Hardware-enabled guarantees (flexHEG) and guarantee processors

    Components could be diverted before a guarantee processor is added, and backdoors could be introduced during design or manufacturing. Open-source designs and physical scans of randomly selected chips are proposed as countermeasures. Part III proposes international oversight of production and extensive testing of a random sample of finished devices. 2 3

    Open question · Open question. On the record

    Related mechanism Proposed Chip registries and manufacturing records: Records each chip's identity and owner from the fab onwards, which bears on diversion before a guarantee processor is fitted. It does not address hidden backdoors. A pointer, not evidence that this failure is mitigated. In the proposal.

Possible additions2 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

Dependencies1 missing prerequisite · 8 blockers
Missing prerequisites
Blockers
8 blockers recorded
  • Hardware-enabled guarantees (flexHEG) and guarantee processors
    • Integrated flexHEG needs substantial help from the accelerator manufacturer, and the authors estimate 3.7–7.9 years, from when the manufacturer starts work, for such hardware to displace other accelerators in frontier development. Access & governance 2
    • State-level attackers who hold the hardware can likely compromise the best current secure enclosures. Hardware trust. Waits on Tamper evidence for verifier devices 2 4
    • Rival states would need to trust the design and manufacture of guarantee processors and enclosures, for example through open design, redundant processors from each side or oversight of production. Hardware trust 1 3
    • Restricting future rule updates would need a formal language for rules, which the authors judge most likely infeasible for early flexHEG versions. Protocol soundness 1
    • Governing all relevant chips depends on knowing where they are, through chip registries and detection of undeclared facilities. Coverage & hidden compute. Waits on Chip registries and manufacturing records 3
  • Chip registries and manufacturing records
    • No implementation of an AI chip registry has been publicly reported, and covering re-exports would need cooperation from re-exporters and foreign governments that may not be feasible everywhere. Access & governance 7 8
    • Linking records to physical chips needs hard-to-spoof unique IDs and inspections. Hardware trust 7 8 9
    • Chips produced before a registry starts must be reconstructed from supplier records. Coverage & hidden compute 9 11
What the verifier seesNo outright disclosure specified

From the family or selected implementation's record.

Exposure notes
ImplementationsNone on the map
Hardware-enabled guarantees (flexHEG) and guarantee processors
None on the map
Chip registries and manufacturing records
None on the map
Sources11 cited
  1. Flexible Hardware-Enabled Guarantees for AI Compute, J. Petrie et al. (2025). Original
  2. Technical Options for Flexible Hardware-Enabled Guarantees, J. Petrie & O. Aarne (2025). Original
  3. International Security Applications of Flexible Hardware-Enabled Guarantees, O. Aarne & J. Petrie (2025). Original
  4. Hardware-Enabled Governance Mechanisms: Developing Technical Solutions to Exempt Items Otherwise Classified Under Export Control Classification Numbers 3A090 and 4A090, G. Kulp et al. (2024). Original
  5. Secure, Governable Chips: Using On-Chip Mechanisms to Manage National Security Risks from AI & Advanced Computing, O. Aarne et al. (2024). Original
  6. Hardware-Enabled Mechanisms for Verifying Responsible AI Development, A. O'Gara et al. (2025). Original
  7. Verifying International Agreements on AI: Six Layers of Verification for Rules on Large-Scale AI Development and Deployment, M. Baker et al. (2025). Original
  8. Near-Term Verification Methods for AI Chip Exports, B. Avellar & E. Grunewald (2026). Original
  9. TSMC most definitely has a golden record of all AI chips it made, N. Cankaya (2025). Original
  10. Hardware-Level Governance of AI Compute: A Feasibility Taxonomy for Regulatory Compliance and Treaty Verification, S. Ansari (2026). Original
  11. Covert AI Projects, B. Halstead & T. Larsen (2026). Original

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Filter mechanisms

Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.

23 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum development status

Development status

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.

All claims

Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.

Start from a published design

Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.

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