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A verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0003,M-0016,M-0013&hide=io,training

Claims

Mechanisms3

Filters:× 23 of 25 match

Applied filters: Keep hidden from the verifier: inputs and outputs, training data. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum development status, Attack testing.

Analysis

Applied filters: Keep hidden from the verifier: inputs and outputs, training data. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum development status, Attack testing.

  • Open failures: n critical n significant n minor
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

Properties3 built for an adversarial prover
Failures since mitigated
  • Verifier dictionary attacks on hashes in Network taps and certifiers 16
Attack testing2 mechanisms with published testing

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

Limits4 scope limitations · 2 open questions · 2 not yet demonstrated · 2 mechanisms with open significant failures
Open significant failures
3 failures in 2 mechanisms
  • Remote memory narrows the timing margin in Timed challenge-response and memory-occupation challenges

    Data-centre remote memory access returns in about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview says verification of memory saturation depends on ruling out remote access by latency or physical disconnection. It names pre-staging data into local memory as the remaining evasion and proposes an unpredictable, capacity-filling challenge to close it. 7

    Known failure · Theoretical argument · Significant · Open. On the record

    Related mechanism Research demo Bandwidth limits and compartmentalization: Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced. A pointer, not evidence that this failure is mitigated. Add

  • Output nondeterminism leaves covert capacity in Network taps and certifiers

    Hashing cannot remove information hidden in the outputs themselves. The Secure Gateway Device paper estimates that about 0.1 bit per token remains even with seed-synchronized replay checks. For a 200k-GPU inference cluster at full load (2,000 tokens per GPU per second), that is about 40 Mbit/s of covert egress, enough to move a 1 TB model in under three days. The paper names this the core remaining challenge and points to deterministic replay or active scrubbing of hardware-induced entropy. An independent study found that an adversary who chooses the prompts roughly doubles the bits leaked per token under Gumbel-based inference verification; see Bounding unexplained information in outputs. 16 22

    Known failure · Theoretical argument · Significant · Open. On the record

    Related mechanism Operational use Deterministic and bit-exact inference: Deterministic replay is one of the two remedies the flaw's source names. A pointer, not evidence that this failure is mitigated. Add

    Related mechanism Research demo Bounding unexplained information in outputs: Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict. A pointer, not evidence that this failure is mitigated. Add

  • Residual side channels in simple passive setups in Network taps and certifiers

    Amodo's analysis of its own tapped prototype lists unvalidated header fields, timing of permitted traffic and variation in response formatting as residual channels, and concludes that the passive tap must be replaced by an active one. 18

    Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations
  • Spare compute is outside the scheme in Whole-workload recomputation (reproducible packets)

    The plan states that it does not verify that spare compute is not used for unapproved workloads, because this seems very challenging. Recomputation checks the correctness of declared work, not its completeness. 1 2

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Proofs of useful work for capacity accounting: Proposed as one input to accounting for spare capacity on declared hardware. A pointer, not evidence that this failure is mitigated. Add

  • Some links cannot be passively tapped in Network taps and certifiers

    Cankaya notes that copper-connected scale-up domains (for example NVL72 racks and TPU v7 cubes) are much harder to tap than fibre, and that optical budgets make passive taps impractical on 400GBASE-SR8 multimode links. Amodo found no taps advertised for 53 GBaud links as of May 2026. 17 23

    Scope limitation · Open question. On the record

  • Encrypted fabrics hide plaintext from both parties in Network taps and certifiers

    Cankaya notes that with TEE-protected sessions whose keys are ephemeral and managed inside the TEE, neither the operator nor the manufacturer can recover session keys after the session, so tapped traffic could not be opened for recomputation. For other encrypted fabrics, the operator can retain keys. 17

    Scope limitation · Open question. On the record

  • Completeness rests on physical monitoring left out of scope in Network taps and certifiers

    The Secure Gateway Device paper assumes the facility is physically monitored, and states that the whole architecture depends on the device being the only communication channel. It names radio emanation, power-line signalling and thermal channels as covert channels beyond that scope. 16

    Scope limitation · Open question. On the record

    Related mechanism Proposed Side-channel suppression for isolated facilities: Addresses the radio, power-line and thermal channels that network-level designs leave out. A pointer, not evidence that this failure is mitigated. Add

Open questions
  • Non-compliant work could be encoded inside compliant-looking packets in Whole-workload recomputation (reproducible packets)

    The plan notes that an AI company might try to encode a non-compliant workload inside a workload that looks compliant on the surface. 1

    Open question · Theoretical argument. On the record

  • Error rates not quantified in Timed challenge-response and memory-occupation challenges

    Monfared et al. show separable timing distributions. Their acceptance rule passes a GPU when its mean time per round stays at or below a chosen maximum, and an appendix outlines statistical tests for the proof-of-work puzzle. They leave hardware-specific threshold values to future work and report no false-positive or false-negative rates. 8

    Open question · Open question. On the record

Possible additions3 for open failures · 5 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

    • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Deterministic replay is one of the two remedies the flaw's source names.
    • Whole-workload recomputation (reproducible packets) waits on it. Workloads are not reproducible by default, and achieving reproducibility may cost performance.
    • Network taps and certifiers waits on it. Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove.
    • Bears on the open significant failure “Remote memory narrows the timing margin” in Timed challenge-response and memory-occupation challenges. Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced.
    • Timed challenge-response and memory-occupation challenges waits on it. Outside help, such as remote memory, must be excluded during challenges.
    • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict.
    • Network taps and certifiers waits on it. Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them.
    • Network taps and certifiers waits on it. Radio, power-line and thermal channels are not addressed by network-level designs.
    • Network taps and certifiers depends on it.
Dependencies4 missing prerequisites · 1 shared foundation · 12 blockers
Missing prerequisites
Shared foundations
Blockers
12 blockers recorded
  • Whole-workload recomputation (reproducible packets)
    • Workloads are not reproducible by default, and achieving reproducibility may cost performance. Performance & compatibility. Waits on Deterministic and bit-exact inference 1
    • Network packets are not individually reproducible by default; making them so may need considerable software, firmware and hardware work. Amodo rates this 'not on track'. Performance & compatibility 4
    • All traffic must reach the recomputation server via network taps, and the server's integrity is critical. Hardware trust. Waits on Network taps and certifiers 1 4
    • Recomputing training steps needs checkpoints: writing one at every step would cost more than 100% overhead, so Amodo's design needs a spare data-parallel replica that tracks the weights instead. Performance & compatibility 2
  • Timed challenge-response and memory-occupation challenges
    • No network-level memory challenge across data-centre servers has been demonstrated. Adversarial validation 7
    • Challenges that fill memory displace workloads; filling a pod's volatile memory takes tens of minutes and SSDs take hours. Performance & compatibility 7 8
    • Outside help, such as remote memory, must be excluded during challenges. Coverage & hidden compute. Waits on Bandwidth limits and compartmentalization 7
  • Network taps and certifiers
    • No complete verification tap has been demonstrated at production frontend link rates, and on the tested CPU no hash algorithm reached line rate with minimum-size frames. Performance & compatibility 23 24
    • Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove. Evidence binding. Waits on Deterministic and bit-exact inference 16
    • Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them. Hardware trust. Waits on Tamper evidence for verifier devices 7 16
    • Radio, power-line and thermal channels are not addressed by network-level designs. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities 16
    • Red-teaming by specialists is called for but has not been reported. Adversarial validation 16
What the verifier sees2 depend on design

From the family or selected implementation's record.

Exposure notes
Implementations7 systems
Whole-workload recomputation (reproducible packets)
Timed challenge-response and memory-occupation challenges
Network taps and certifiers
Sources24 cited
  1. Verification Plan, R. Dean (2026). Original
  2. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
  3. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
  4. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
  5. Get Involved in Verification, AI Futures Project (2026). Original
  6. Proof-of-Learning is Currently More Broken Than You Think, C. Fang et al. (2023). Original
  7. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
  8. Timing and Memory Telemetry on GPUs for AI Governance, S. K. Monfared et al. (2026). Original
  9. SAGE: Software-based Attestation for GPU Execution, A. Ivanov et al. (2023). Original
  10. SWATT: SoftWare-based ATTestation for Embedded Devices, A. Seshadri et al. (2004). Original
  11. Proofs of Space, S. Dziembowski et al. (2015). Original
  12. Secure Code Update for Embedded Devices via Proofs of Secure Erasure, D. Perito & G. Tsudik (2010). Original
  13. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). Original
  14. On the Difficulty of Software-Based Attestation of Embedded Devices, C. Castelluccia et al. (2009). Original
  15. Refutation of "On the Difficulty of Software-Based Attestation of Embedded Devices", A. Perrig & L. van Doorn (2010). Original
  16. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). Original
  17. The Fundamentals and Feasibility of Secure Network Taps for Verifying AI Datacenter Use, N. Cankaya (2026). Original
  18. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
  19. Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
  20. inference-verification: Inference Verification Prototype, Singapore AI Safety Hub (SASH) (2026). Original
  21. Internationalising AI Verification, Singapore AI Safety Hub (SASH) (2026). Original
  22. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
  23. Network Tapping for AI Verification: A Technical Assessment, Amodo Design (2026). Original
  24. Network Traffic Hashing, Amodo Design (2026). Original

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Filter mechanisms

Filters apply to mechanisms only. They describe the setting a proposal is for, and all are off by default. A mechanism that a filter rules out is flagged and does not count towards claim coverage. Selected implementations use their own record fields. A match means not excluded; conditional or unspecified exposure stays with a note. Passing a filter does not establish that the assumptions hold in a deployment.

23 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum development status

Development status

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.

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Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.

Start from a published design

Choosing a design loads the mechanisms its record realises or depends on. If the proposal has no claims yet, it also loads the claims that record says the design addresses.

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