Proposal Explorer

Add claims to see which ones the mechanisms address.

Operational use

• Operational use Sampled inference recomputation for checking untrusted workers' activations against the declared model, prompt and precision

Built for an adversarial prover

Bandwidth limits and compartmentalization, Timed challenge-response and memory-occupation challenges and Sampled inference recomputation

No new hardware needed

Timed challenge-response and memory-occupation challenges and Sampled inference recomputation

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

• Bandwidth limits and compartmentalization: Analysis
• Timed challenge-response and memory-occupation challenges: Analysis
• Sampled inference recomputation: Analysis

Open significant failures

5 failures in 3 mechanisms

• Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

  Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. ²

  Known failure · Theoretical argument · Significant · Open. On the record

• Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

  In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. ⁵

  Known failure · Theoretical argument · Significant · Open. On the record

• Remote memory narrows the timing margin in Timed challenge-response and memory-occupation challenges

  Data-centre remote memory access returns in about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview says verification of memory saturation depends on ruling out remote access by latency or physical disconnection. It names pre-staging data into local memory as the remaining evasion and proposes an unpredictable, capacity-filling challenge to close it. ³

  Known failure · Theoretical argument · Significant · Open. On the record

  Related mechanism Research demo Bandwidth limits and compartmentalization: Physical disconnection is proposed to exclude remote memory between the separated groups during a challenge. It depends on the isolation boundary being enforced. A pointer, not evidence that this failure is mitigated. In the proposal.

• Tolerance for numerical noise leaves a covert channel in Sampled inference recomputation

  Schemes that accept approximate matches can put an upper bound on an adversary's covert bandwidth, but they cannot close the channel. The weight-exfiltration detector cut exfiltratable information to under 0.5%, not to zero, on a 30-billion-parameter mixture-of-experts model under benign prompt traffic. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token. Across six models, that cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target the check that outputs match the declared model. ^{16 24 27}

  Known failure · Demonstrated attack · Significant · Open. On the record

  Related mechanism Operational use Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration. A pointer, not evidence that this failure is mitigated. Add

• Some inference optimizations are not covered in Sampled inference recomputation

  TOPLOC's authors state that it cannot detect speculative decoding in which a cheaper model does the decoding. They did not test whether it distinguishes types of key-value (KV) cache compression. DiFR was evaluated only on sampling from a single model. Its authors sketch an extension to one speculative-decoding algorithm but do not test it. ^{17 18}

  Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations

• Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

  More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. ²

  Scope limitation · Theoretical argument. On the record

• Training within one pod is not covered in Bandwidth limits and compartmentalization

  Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. ²

  Scope limitation · Open question. On the record

• Only recorded traffic is checked in Sampled inference recomputation

  Recomputation checks that recorded, declared workloads are correct. It cannot show that the record is complete. The published schemes do not cover hidden workloads run on the same compute, or substituted work. Rinberg et al. say their exfiltration-detection scheme cannot stand alone. ^{16 28}

  Scope limitation · Theoretical argument. On the record

  Related mechanism Proposed Network taps and certifiers: Taps copy and hash all traffic on the monitored links, which bears on whether the traffic record is complete. They do not show what else ran on the same chips. A pointer, not evidence that this failure is mitigated. Add

Open questions

• Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

  DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. ^{2 6 7}

  Open question · Theoretical argument. On the record

• Error rates not quantified in Timed challenge-response and memory-occupation challenges

  Monfared et al. show separable timing distributions. Their acceptance rule passes a GPU when its mean time per round stays at or below a chosen maximum, and an appendix outlines statistical tests for the proof-of-work puzzle. They leave hardware-specific threshold values to future work and report no false-positive or false-negative rates. ⁸

  Open question · Open question. On the record

Open minor failures

1 mechanism with minor failures

• Mixed hardware widens the honest baseline in Sampled inference recomputation

  When honest reference runs span different GPU types, the spread of benign scores grows. In DiFR's tests on Qwen3-30B-A3B, pooling A100 and H200 runs left Token-DiFR unable to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy separated them. Matched provider and verifier environments, or pooling that weights rare large deviations, restored detection. ¹⁷

  Known failure · Open question · Minor · Open. On the record

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• Operational use Deterministic and bit-exact inference Add
  • Bears on the open significant failure “Tolerance for numerical noise leaves a covert channel” in Sampled inference recomputation. Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration.
• Research demo Tamper evidence for verifier devices Add
  • Bandwidth limits and compartmentalization waits on it. Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU.
• Proposed Network taps and certifiers Add
  • Bandwidth limits and compartmentalization waits on it. The verifier must know that all traffic leaving a pod crosses the capped, monitored links.
  • Sampled inference recomputation waits on it. In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface.

Missing prerequisites

• Research demo Tamper evidence for verifier devices needed by Bandwidth limits and compartmentalization Add

Shared foundations

• Network taps and certifiers relied on by Bandwidth limits and compartmentalization and Sampled inference recomputation

Blockers

12 blockers recorded

• Bandwidth limits and compartmentalization
  • No cap that a verifier can check has been implemented or red-teamed. Adversarial validation ²
  • The verifier must know that all traffic leaving a pod crosses the capped, monitored links. Coverage & hidden compute. Waits on Network taps and certifiers ³
  • Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU. Hardware trust. Waits on Tamper evidence for verifier devices ^{2 5}
  • Advances in low-communication training could shrink the margin that the cap enforces. Capacity bounds ^{2 6 7}
• Timed challenge-response and memory-occupation challenges
  • No network-level memory challenge across data-centre servers has been demonstrated. Adversarial validation ³
  • Challenges that fill memory displace workloads; filling a pod's volatile memory takes tens of minutes and SSDs take hours. Performance & compatibility ^{3 8}
  • Outside help, such as remote memory, must be excluded during challenges. Coverage & hidden compute. Waits on Bandwidth limits and compartmentalization ³
• Sampled inference recomputation
  • In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface. Coverage & hidden compute. Waits on Network taps and certifiers ^{1 23}
  • In retrofit designs, the recomputation server must sit inside the prover's data centre, possibly under the prover's physical control, and still be protected from a compromised provider, which Amodo rates 'not on track'. Hardware trust ^{16 23}
  • No independent red-team of a recomputation consistency check has been published (the one independent attack study targets the weight-exfiltration bound), and Amodo rates recomputation red-teaming 'not started'. Adversarial validation ^{23 24}
  • Tolerance-based checks need calibration on trusted hardware and exact knowledge of the provider's sampling procedure, and in one prototype a sampling-implementation mismatch produced large spurious differences. Performance & compatibility ^{17 22}
  • The verifier needs the model weights, so checking a closed-weights model requires a trusted, confidential recomputation environment, which the retrofit designs place inside the prover's facility. Privacy & leakage ^{3 17 28}

From the family or selected implementation's record. ?

Model weights

Depends on the design for Sampled inference recomputation.

Not involved: Bandwidth limits and compartmentalization and Timed challenge-response and memory-occupation challenges.

Inputs and outputs

Depends on the design for Sampled inference recomputation.

Not involved: Bandwidth limits and compartmentalization and Timed challenge-response and memory-occupation challenges.

Training data

Not involved: Bandwidth limits and compartmentalization, Timed challenge-response and memory-occupation challenges and Sampled inference recomputation.

Bandwidth limits and compartmentalization

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Proposed RAND secure inference data center (SIDC) design Proposed architecture, RAND

Timed challenge-response and memory-occupation challenges

• Proposed Data-centre memory challenging Proposed architecture, Machine Intelligence Research Institute
• Research demo GPU contention probes Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Research demo SAGE Research prototype
• Research demo VRAM-residency challenge Research prototype

Sampled inference recomputation

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Research demo DiFR (Divergence From Reference) Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)
• Operational use TOPLOC Open-source project, Prime Intellect

1. Verification Plan, R. Dean (2026). Original
2. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
3. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
4. De-risking Interconnect Limits for AI Verification, A. Scher et al. (2026). Original
5. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
6. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
7. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
8. Timing and Memory Telemetry on GPUs for AI Governance, S. K. Monfared et al. (2026). Original
9. SAGE: Software-based Attestation for GPU Execution, A. Ivanov et al. (2023). Original
10. SWATT: SoftWare-based ATTestation for Embedded Devices, A. Seshadri et al. (2004). Original
11. Proofs of Space, S. Dziembowski et al. (2015). Original
12. Secure Code Update for Embedded Devices via Proofs of Secure Erasure, D. Perito & G. Tsudik (2010). Original
13. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). Original
14. On the Difficulty of Software-Based Attestation of Embedded Devices, C. Castelluccia et al. (2009). Original
15. Refutation of "On the Difficulty of Software-Based Attestation of Embedded Devices", A. Perrig & L. van Doorn (2010). Original
16. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
17. DiFR: Inference Verification Despite Nondeterminism, A. Karvonen et al. (2025). Original
18. TOPLOC: A Locality Sensitive Hashing Scheme for Trustless Verifiable Inference, J. M. Ong et al. (2025). Original
19. PrimeIntellect-ai/toploc (GitHub repository), Prime Intellect (2025). Original
20. INTELLECT-2: A Reasoning Model Trained Through Globally Decentralized Reinforcement Learning, Prime Intellect Team et al. (2025). Original
21. adamkarvonen/difr (GitHub repository), A. Karvonen (2025). Original
22. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
23. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
24. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
25. SYNTHETIC-2 Release: Four Million Collaboratively Generated Reasoning Traces, Prime Intellect (2025). Original
26. An Inference Verification Prototype — Stage 1, Amodo Design (2026). Original
27. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
28. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original