Proposal Explorer

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No new hardware needed

Chip location verification

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

• Chip location verification, Lucid sovereignty (location) certificates: Analysis

Family findings

• Chip location verification

  Context for Lucid sovereignty (location) certificates. These findings concern the family or other implementations; applicability must be checked against their stated scope.

  • Extracting a chip's key lets another device answer for it in Chip location verification

    Ping-based protocols rely on cryptographic keys stored on the chip. Tee and Happel argue that an adversary with physical access could extract these keys and so compromise location verification. They propose GPU fingerprints as a mitigation, so far tested on 24 GPUs. Brass and Aarne assume the keys are stored securely, for example in a TPM. ^{5 6}

    Theoretical argument · Significant · Open. On the record

  • Added delay can shift an estimated position in Chip location verification

    Brass and Aarne cite internet-geolocation research in which artificially increased round-trip times moved the estimated location by up to 1,000 km, with a 74% chance of avoiding detection. Avellar and Grunewald list inflated ping times from circuitous routing as an evasion route. Added delay only loosens a distance bound, and Brass and Aarne propose a hard time limit as the counter: a chip that replies too slowly cannot be ruled out of a restricted location. ^{6 7}

    Demonstrated attack · Significant · Open. On the record

  • Faster-than-assumed network paths in Chip location verification

    Brass and Aarne list dark fibre and other private high-speed interconnects as ways to lower measured delays artificially. They judge that leasing dark fibre would probably not be a considerable challenge for covertly or openly adversarial actors. Avellar and Grunewald note that this can make a chip appear to be somewhere else entirely. A limit set at the vacuum speed of light cannot be beaten, but it makes honest chips fail more often. ^{6 7}

    Theoretical argument · Significant · Open. On the record

  • Compromised landmarks can falsify measurements in Chip location verification

    A party that controls landmark servers can report false timing. Brass and Aarne cite research in which manipulating a third of the landmarks shifted the estimated location by about 700 km. Avellar and Grunewald note that compromised landmarks let adversaries spoof travel-time measurements directly. The draft specification asks verifiers to require anchors in diverse places, run by several independent operators. ^{1 6 7}

    Theoretical argument · Significant · Open. On the record

Open significant flaws

3 flaws in 1 mechanism

• Physical attacks on the trusted hardware are out of scope in Lucid sovereignty (location) certificates

  The specification places the hardware root of trust and the TEE in the trusted computing base. It assumes they resist software attacks, notes that the attacker may have physical access, and leaves sophisticated physical attacks, such as bus probing and side-channel analysis, as a residual risk. It says that future revisions may add requirements for physical tamper evidence. ¹

  Theoretical argument · Significant · Open. On the record

• On-chip keys may be extractable in Lucid sovereignty (location) certificates

  Tee and Happel argue that ping-based location protocols backed by keys stored on the chip can be compromised if an adversary with physical access extracts those keys. In this specification, the evidence chain rests on the hardware root of trust's signed quote, whose signing key must be protected by the hardware. ^{1 5}

  Theoretical argument · Significant · Open. On the record

• General delay and landmark attacks apply in Lucid sovereignty (location) certificates

  Attacks on delay-based location verification in general also apply. Brass and Aarne discuss adding delay, using faster paths such as dark fibre, and compromising landmarks. The specification counters anchor impersonation with a signed anchor directory. Against collusion it recommends anchors in diverse places run by several independent operators, and peer monitoring that temporarily removes anchors whose timings deviate. ^{1 6}

  Theoretical argument · Significant · Open. On the record

Not yet demonstrated

R1 Chip location verification

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• R3 TEE remote attestation for AI workloads Add
  • Chip location verification depends on it.

Missing prerequisites

• R3 TEE remote attestation for AI workloads needed by Chip location verification Add

Blockers

2 blockers recorded

• Chip location verification
  • The specification is an unfinished draft with no public implementation or evaluation. Adversarial validation ^{1 2}
  • It needs a globally distributed, trusted anchor fleet and an endorser to run the anchor directory. Access & governance ¹

From the family or selected implementation's record. ?

Model weights

Unspecified for Chip location verification. Check the implementation record.

Inputs and outputs

Unspecified for Chip location verification. Check the implementation record.

Training data

Unspecified for Chip location verification. Check the implementation record.

Chip location verification

• R1 Lucid sovereignty (location) certificates Standard, Lucid Computing

1. Sovereignty Certificates: draft specification, version 0.1.0, Sovereignty Certificates Working Group (2025). Original
2. Sovereignty Certificates Working Group (2026). Original
3. Lucid Computing: Verifiable AI. Proven in hardware. (2026). Original
4. Lucid Developer Platform documentation (2026). Original
5. GPU Fingerprinting for Location Verification, W. Tee & J. Happel (2026). Original
6. Location Verification for AI Chips, A. Brass & O. Aarne (2024). Original
7. Near-Term Verification Methods for AI Chip Exports, B. Avellar & E. Grunewald (2026). Original