Proposal Explorer

Add claims to see which ones the mechanisms address.

In production

• R3 Model identity attestation for showing users that a service runs the declared model weights

Built for an adversarial prover

Bandwidth limits and compartmentalization and Remote detection of data centres

No new hardware needed

Model identity attestation, Chip registries and manufacturing records and Remote detection of data centres

Flaws since mitigated

• Launch-state attestation does not by itself cover weights loaded later in Model identity attestation ^{8 20}

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

• Bandwidth limits and compartmentalization: Analysis
• Model identity attestation: Independent red-team
• Chip registries and manufacturing records: Analysis
• Remote detection of data centres: Analysis

Open critical flaws

• Underlying attestation can be forged or relayed in Model identity attestation

  Critical for the enclave route against an operator with physical access to affected hardware, or control of an unpatched SEV-SNP hypervisor. It does not apply to the recomputation route. PAL*M excludes physical attacks, and Tinfoil acknowledges this boundary.

  The enclave route inherits the platform-specific TEE attestation failures. Intel TDX forgery and H100 relay were demonstrated with physical access and host control. Battering RAM defeated AMD SEV-SNP attestation on DDR4 servers; RMPocalypse did so from malicious host software on platforms without AMD's fixes. These demonstrate failures of the trust roots, not of each model-commitment protocol. ^{9 11 15 17 18 19}

  Response: The TEE.fail authors report that physical interposer attacks are outside Intel's and AMD's threat models. AMD reports fixes for RMPocalypse.

  Demonstrated attack · Critical · Open · Inherited finding. On the record · Related finding in TEE remote attestation for AI workloads

  Related mechanism R1 Hardware-enabled guarantees (flexHEG) and guarantee processors: A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically. A pointer, not evidence that this flaw is mitigated. Add

Open significant flaws

13 flaws in 4 mechanisms

• Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

  DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. ^{2 6 7}

  Theoretical argument · Significant · Open. On the record

• Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

  Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. ²

  Theoretical argument · Significant · Open. On the record

• Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

  More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. ²

  Theoretical argument · Significant · Open. On the record

• Training within one pod is not covered in Bandwidth limits and compartmentalization

  Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. ²

  Open question · Significant · Open. On the record

• Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

  In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. ⁵

  Theoretical argument · Significant · Open. On the record

• For private models, a user can confirm consistency but not content in Model identity attestation

  When weights are not published, users can check that the same root hash is served each time, but not what the model is. Pairing the hash with an attested evaluation, as in Attestable Audits, is one proposed remedy. ^{8 21}

  Open question · Significant · Open. On the record

• Recomputation depends on trusted logging and randomness, and its tolerance leaves a covert channel in Model identity attestation

  The recomputation variant assumes that every input, output and seed is logged correctly, and that the attacker can neither predict nor manipulate which messages are sampled for verification. Legitimate nondeterminism concentrates at a few token positions, and slow leaks within the tolerated slack remain possible. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token, reducing the exfiltration slowdown from 146–254 times under benign prompts to 60–118 times. The attack targets the exfiltration bound, not the check that outputs match the declared model. ^{10 16}

  Demonstrated attack · Significant · Open. On the record

  Related mechanism R1 Network taps and certifiers: Taps are proposed to copy and hash traffic on the monitored links, reducing reliance on the prover's own log. This still depends on the monitored boundary and trusted capture. A pointer, not evidence that this flaw is mitigated. Add

  Related mechanism R3 Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance that leaves this channel. A pointer, not evidence that this flaw is mitigated. Add

• Records cover only chips that were recorded in Chip registries and manufacturing records

  A registry or commitment accounts only for chips entered into it. Cankaya asks how a verifier would know it had found all chips, or how much "dark compute" remains, and notes that a fraudulent original record would mean unregistered chips had been made in advance. Halstead and Larsen propose reconstructing earlier production by auditing upstream suppliers. ^{24 26}

  Theoretical argument · Significant · Open. On the record

  Related mechanism R1 Remote detection of data centres: Looks for large data centres that were never declared, which a registry cannot show. A pointer, not evidence that this flaw is mitigated. In the proposal.

• Documents and serial numbers can be forged in Chip registries and manufacturing records

  Avellar and Grunewald note that export documents can be forged, that companies can hide information behind obscure corporate structures, and that it may be possible to forge serial numbers on chips and racks. They recommend cryptographic attestation of a powered-on chip as an extra check. ²³

  Theoretical argument · Significant · Open. On the record

• Insiders could alter records before they are fixed in Chip registries and manufacturing records

  Cankaya argues that insiders who can photograph process secrets could also tamper with production records. A commitment makes changes after publication detectable, but it cannot show that the records were accurate when committed. ²⁴

  Theoretical argument · Significant · Open. On the record

• Facilities can be disguised or hidden in Remote detection of data centres

  Halstead and Larsen discuss two ways to hide a facility. One is to disguise it as a legitimate industrial site. The other is to build it underground, with cooling that avoids visible heat plumes. They note that the underground option requires bespoke engineering. ²⁶

  Theoretical argument · Significant · Open. On the record

• Small sites may not be detectable in Remote detection of data centres

  Halstead and Larsen conclude that a sufficiently small covert project could not be ruled out with confidence. In their estimates, the chance of detection is lower for smaller sites. Krawec notes that small data centres in existing buildings may lack the distinctive features of large facilities. ^{26 27}

  Theoretical argument · Significant · Open. On the record

  Related mechanism R1 Chip registries and manufacturing records: Accounts for chips from the fab onwards, which does not depend on a site being visible. A pointer, not evidence that this flaw is mitigated. In the proposal.

• Search for unknown sites is undemonstrated in Remote detection of data centres

  Krawec reports that telling data centres apart from other industrial facilities systematically is difficult. Automating detection would need large amounts of training imagery and a purpose-trained model. In Krawec's words, automated data-centre detection "remains primarily conceptual at present". ²⁷

  Open question · Significant · Open. On the record

Not yet demonstrated

R1 Chip registries and manufacturing records and R1 Remote detection of data centres

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• R1 Hardware-enabled guarantees (flexHEG) and guarantee processors Add
  • Bears on the open critical flaw “Underlying attestation can be forged or relayed” in Model identity attestation. A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically.
• R3 Deterministic and bit-exact inference Add
  • Bears on the open significant flaw “Recomputation depends on trusted logging and randomness, and its tolerance leaves a covert channel” in Model identity attestation. Bit-exact inference would remove the numerical tolerance that leaves this channel.
  • Model identity attestation waits on it. Numerical nondeterminism limits how tightly recomputation can pin down the model and sampling.
• R1 Network taps and certifiers Add
  • Bears on the open significant flaw “Recomputation depends on trusted logging and randomness, and its tolerance leaves a covert channel” in Model identity attestation. Taps are proposed to copy and hash traffic on the monitored links, reducing reliance on the prover's own log. This still depends on the monitored boundary and trusted capture.
  • Bandwidth limits and compartmentalization waits on it. The verifier must know that all traffic leaving a pod crosses the capped, monitored links.
• R3 TEE remote attestation for AI workloads Add
  • Model identity attestation waits on it. Attestation that resists physical attackers, for the enclave variant.
• R2 Tamper evidence for verifier devices Add
  • Bandwidth limits and compartmentalization waits on it. Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU.

Missing prerequisites

• R2 Tamper evidence for verifier devices needed by Bandwidth limits and compartmentalization Add

Blockers

13 blockers recorded

• Bandwidth limits and compartmentalization
  • No cap that a verifier can check has been implemented or red-teamed. Adversarial validation ²
  • The verifier must know that all traffic leaving a pod crosses the capped, monitored links. Coverage & hidden compute. Waits on Network taps and certifiers ³
  • Shaping devices and routing assignments must be trusted by both parties; Amodo has not yet fully analysed resilience to a compromised DPU. Hardware trust. Waits on Tamper evidence for verifier devices ^{2 5}
  • Advances in low-communication training could shrink the margin that the cap enforces. Capacity bounds ^{2 6 7}
• Model identity attestation
  • Attestation that resists physical attackers, for the enclave variant. Hardware trust. Waits on TEE remote attestation for AI workloads ¹⁵
  • Numerical nondeterminism limits how tightly recomputation can pin down the model and sampling. Protocol soundness. Waits on Deterministic and bit-exact inference ¹⁰
  • The recomputation variant needs the verifier to hold the declared weights. Access & governance ¹⁰
• Chip registries and manufacturing records
  • No AI chip registry operates, and covering re-exports would need cooperation from re-exporters and foreign governments that may not be feasible everywhere. Access & governance ^{22 23}
  • Linking records to physical chips needs hard-to-spoof unique IDs and inspections. Hardware trust ^{22 23 24}
  • Chips produced before a registry starts must be reconstructed from supplier records. Coverage & hidden compute ^{24 26}
• Remote detection of data centres
  • Wide-area, automated detection of data centres is not yet practical and needs large training datasets. Coverage & hidden compute ²⁷
  • No measured detection or false-alarm rates for finding undeclared facilities have been published. Adversarial validation ^{26 27}
  • Recent high-resolution imagery is costly, is limited by weather and needs trained analysts. Access & governance ²⁷

From the family or selected implementation's record. ?

Model weights

Depends on the design for Model identity attestation.

Not involved: Bandwidth limits and compartmentalization, Chip registries and manufacturing records and Remote detection of data centres.

Inputs and outputs

Depends on the design for Model identity attestation.

Not involved: Bandwidth limits and compartmentalization, Chip registries and manufacturing records and Remote detection of data centres.

Training data

Not involved: Bandwidth limits and compartmentalization, Model identity attestation, Chip registries and manufacturing records and Remote detection of data centres.

Bandwidth limits and compartmentalization

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• R1 RAND secure inference data center (SIDC) design Proposed architecture, RAND

Model identity attestation

• R2 Attestable Audits Research prototype, University of Cambridge
• R2 PAL*M Research prototype, University of Waterloo
• R3 Tinfoil model identity (Modelwrap) Product, Tinfoil

Chip registries and manufacturing records

None on the map

Remote detection of data centres

None on the map

1. Verification Plan, R. Dean (2026). Original
2. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
3. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
4. De-risking Interconnect Limits for AI Verification, A. Scher et al. (2026). Original
5. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
6. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
7. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
8. How Tinfoil Proves Exactly What Model Is Running, Tinfoil Team (2026). Original
9. PAL*M: Property Attestation for Large Generative Models, P. Chantasantitam et al. (2026). Original
10. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
11. A primer on secure enclaves, Tinfoil (2026). Original
12. Backend infrastructure, Tinfoil (2026). Original
13. How verification works in Tinfoil, Tinfoil (2026). Original
14. modelwrap: Reproducible dm-verity read-only image of Huggingface models, Tinfoil (2026). Original
15. TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition, J. Chuang et al. (2026). Original
16. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
17. Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing, J. De Meulemeester et al. (2026). Original
18. RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP, B. Schlüter & S. Shinde (2025). Original
19. SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020), AMD (2025). Original
20. On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
21. Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments, C. Schnabl et al. (2025). Original
22. Verifying International Agreements on AI: Six Layers of Verification for Rules on Large-Scale AI Development and Deployment, M. Baker et al. (2025). Original
23. Near-Term Verification Methods for AI Chip Exports, B. Avellar & E. Grunewald (2026). Original
24. TSMC most definitely has a golden record of all AI chips it made, N. Cankaya (2025). Original
25. Hardware-Level Governance of AI Compute: A Feasibility Taxonomy for Regulatory Compliance and Treaty Verification, S. Ansari (2026). Original
26. Covert AI Projects, B. Halstead & T. Larsen (2026). Original
27. Tracking Hyperscale AI Data Center Growth with Satellite Imagery, C. Krawec (2026). Original
28. Introducing the Frontier Data Centers Hub, Epoch AI (2025). Original
29. AI Data Centers Documentation – Methodology, Epoch AI (2026). Original