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A verification proposal from the AI Verification Tech Map, from its records of 2026-10-09. https://trustbutveri.fyi/explorer/?mechanisms=M-0012,M-0013,M-0001&hide=weights

Claims

Mechanisms3

Filters:× 24 of 25 match

Applied filters: Keep hidden from the verifier: model weights. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum development status, Attack testing.

Analysis

Applied filters: Keep hidden from the verifier: model weights. Not set (Any): Prover, Verifier devices on site, Prover cooperation, Chips, Minimum development status, Attack testing.

  • Open failures: n critical n significant n minor
Claim coverageNo claims yet

Add claims to see which ones the mechanisms address.

Properties2 with operational use · 2 built for an adversarial prover
Operational use
Failures since mitigated
  • Launch-state attestation does not by itself cover weights loaded later in Hardware-attested weight binding 1 11
  • Verifier dictionary attacks on hashes in Network taps and certifiers 13
Attack testing3 mechanisms with published testing

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

Limits1 mechanism with open critical failures · 5 scope limitations · 1 not yet demonstrated · 2 mechanisms with open significant failures
Open critical failures
  • Underlying attestation can be forged or relayed in Hardware-attested weight binding

    Critical for weight binding against an operator with physical access to affected hardware, or with control of the hypervisor on an AMD SEV-SNP platform without AMD's fixes. PAL*M excludes physical attacks, and Tinfoil acknowledges this boundary.

    The enclave route inherits the platform-specific TEE attestation failures. Intel TDX forgery and H100 relay were demonstrated with physical access and host control. Battering RAM defeated AMD SEV-SNP attestation on DDR4 servers; RMPocalypse did so from malicious host software on platforms without AMD's fixes. These demonstrate failures of the trust roots, not of each model-commitment protocol. 2 3 7 8 9 10

    Response: The TEE.fail authors report that physical interposer attacks are outside Intel's and AMD's threat models. AMD reports fixes for RMPocalypse.

    Known failure · Demonstrated attack · Critical · Open · Inherited finding. On the record · Related finding in TEE remote attestation for AI workloads

    Related mechanism Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors: A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically. A pointer, not evidence that this failure is mitigated. Add

Open significant failures
4 failures in 2 mechanisms
  • Output nondeterminism leaves covert capacity in Network taps and certifiers

    Hashing cannot remove information hidden in the outputs themselves. The Secure Gateway Device paper estimates that about 0.1 bit per token remains even with seed-synchronized replay checks. For a 200k-GPU inference cluster at full load (2,000 tokens per GPU per second), that is about 40 Mbit/s of covert egress, enough to move a 1 TB model in under three days. The paper names this the core remaining challenge and points to deterministic replay or active scrubbing of hardware-induced entropy. An independent study found that an adversary who chooses the prompts roughly doubles the bits leaked per token under Gumbel-based inference verification; see Bounding unexplained information in outputs. 13 21

    Known failure · Theoretical argument · Significant · Open. On the record

    Related mechanism Operational use Deterministic and bit-exact inference: Deterministic replay is one of the two remedies the flaw's source names. A pointer, not evidence that this failure is mitigated. Add

    Related mechanism Research demo Bounding unexplained information in outputs: Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict. A pointer, not evidence that this failure is mitigated. Add

  • Residual side channels in simple passive setups in Network taps and certifiers

    Amodo's analysis of its own tapped prototype lists unvalidated header fields, timing of permitted traffic and variation in response formatting as residual channels, and concludes that the passive tap must be replaced by an active one. 17

    Known failure · Theoretical argument · Significant · Open. On the record

  • Tolerance for numerical noise leaves a covert channel in Sampled inference recomputation

    Schemes that accept approximate matches can put an upper bound on an adversary's covert bandwidth, but they cannot close the channel. The weight-exfiltration detector cut exfiltratable information to under 0.5%, not to zero, on a 30-billion-parameter mixture-of-experts model under benign prompt traffic. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token. Across six models, that cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target the check that outputs match the declared model. 21 23 33

    Known failure · Demonstrated attack · Significant · Open. On the record

    Related mechanism Operational use Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration. A pointer, not evidence that this failure is mitigated. Add

  • Some inference optimizations are not covered in Sampled inference recomputation

    TOPLOC's authors state that it cannot detect speculative decoding in which a cheaper model does the decoding. They did not test whether it distinguishes types of key-value (KV) cache compression. DiFR was evaluated only on sampling from a single model. Its authors sketch an extension to one speculative-decoding algorithm but do not test it. 24 25

    Known failure · Theoretical argument · Significant · Open. On the record

Scope limitations
  • For private models, a user can confirm consistency but not content in Hardware-attested weight binding

    When weights are not published, users can check that the same root hash is served each time, but not what the model is. Pairing the hash with an attested evaluation, as in Attestable Audits, is one proposed remedy. 1 12

    Scope limitation · Open question. On the record

  • Some links cannot be passively tapped in Network taps and certifiers

    Cankaya notes that copper-connected scale-up domains (for example NVL72 racks and TPU v7 cubes) are much harder to tap than fibre, and that optical budgets make passive taps impractical on 400GBASE-SR8 multimode links. Amodo found no taps advertised for 53 GBaud links as of May 2026. 14 22

    Scope limitation · Open question. On the record

  • Encrypted fabrics hide plaintext from both parties in Network taps and certifiers

    Cankaya notes that with TEE-protected sessions whose keys are ephemeral and managed inside the TEE, neither the operator nor the manufacturer can recover session keys after the session, so tapped traffic could not be opened for recomputation. For other encrypted fabrics, the operator can retain keys. 14

    Scope limitation · Open question. On the record

  • Completeness rests on physical monitoring left out of scope in Network taps and certifiers

    The Secure Gateway Device paper assumes the facility is physically monitored, and states that the whole architecture depends on the device being the only communication channel. It names radio emanation, power-line signalling and thermal channels as covert channels beyond that scope. 13

    Scope limitation · Open question. On the record

    Related mechanism Proposed Side-channel suppression for isolated facilities: Addresses the radio, power-line and thermal channels that network-level designs leave out. A pointer, not evidence that this failure is mitigated. Add

  • Only recorded traffic is checked in Sampled inference recomputation

    Recomputation checks that recorded, declared workloads are correct. It cannot show that the record is complete. The published schemes do not cover hidden workloads run on the same compute, or substituted work. Rinberg et al. say their exfiltration-detection scheme cannot stand alone. 23 34

    Scope limitation · Theoretical argument. On the record

    Related mechanism Proposed Network taps and certifiers: Taps copy and hash all traffic on the monitored links, which bears on whether the traffic record is complete. They do not show what else ran on the same chips. A pointer, not evidence that this failure is mitigated. In the proposal.

Open minor failures
1 mechanism with minor failures
  • Mixed hardware widens the honest baseline in Sampled inference recomputation

    When honest reference runs span different GPU types, the spread of benign scores grows. In DiFR's tests on Qwen3-30B-A3B, pooling A100 and H200 runs left Token-DiFR unable to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy separated them. Matched provider and verifier environments, or pooling that weights rare large deviations, restored detection. 24

    Known failure · Open question · Minor · Open. On the record

Possible additions3 for open failures · 4 for dependencies

Mechanisms on the map that are not in the proposal. Pointers, not recommendations.

    • Bears on the open critical failure “Underlying attestation can be forged or relayed” in Hardware-attested weight binding. A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically.
    • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Deterministic replay is one of the two remedies the flaw's source names.
    • Bears on the open significant failure “Tolerance for numerical noise leaves a covert channel” in Sampled inference recomputation. Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration.
    • Network taps and certifiers waits on it. Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove.
    • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict.
    • Hardware-attested weight binding waits on it. Attestation that resists physical attackers, for the enclave variant.
    • Network taps and certifiers waits on it. Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them.
    • Network taps and certifiers waits on it. Radio, power-line and thermal channels are not addressed by network-level designs.
Dependencies4 missing prerequisites · 11 blockers
Missing prerequisites
Blockers
11 blockers recorded
  • Hardware-attested weight binding
    • Attestation that resists physical attackers, for the enclave variant. Hardware trust. Waits on TEE remote attestation for AI workloads 7
  • Network taps and certifiers
    • No complete verification tap has been demonstrated at production frontend link rates, and on the tested CPU no hash algorithm reached line rate with minimum-size frames. Performance & compatibility 22 35
    • Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove. Evidence binding. Waits on Deterministic and bit-exact inference 13
    • Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them. Hardware trust. Waits on Tamper evidence for verifier devices 13 15
    • Radio, power-line and thermal channels are not addressed by network-level designs. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities 13
    • Red-teaming by specialists is called for but has not been reported. Adversarial validation 13
  • Sampled inference recomputation
    • In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface. Coverage & hidden compute. Waits on Network taps and certifiers 16 30
    • In retrofit designs, the recomputation server must sit inside the prover's data centre, possibly under the prover's physical control, and still be protected from a compromised provider, which Amodo rates 'not on track'. Hardware trust 23 30
    • No independent red-team of a recomputation consistency check has been published (the one independent attack study targets the weight-exfiltration bound), and Amodo rates recomputation red-teaming 'not started'. Adversarial validation 21 30
    • Tolerance-based checks need calibration on trusted hardware and exact knowledge of the provider's sampling procedure, and in one prototype a sampling-implementation mismatch produced large spurious differences. Performance & compatibility 24 29
    • The verifier needs the model weights, so checking a closed-weights model requires a trusted, confidential recomputation environment, which the retrofit designs place inside the prover's facility. Privacy & leakage 15 24 34
What the verifier sees1 unspecified · 2 depend on design

From the family or selected implementation's record.

Inputs and outputs

Depends on the design for Network taps and certifiers and Sampled inference recomputation.

Unspecified for Hardware-attested weight binding. Check the implementation record.

Training data

Depends on the design for Network taps and certifiers.

Not involved: Hardware-attested weight binding and Sampled inference recomputation.

Exposure notes
  • Hardware-attested weight binding: Verifiers check a hash commitment to the weights, carried in a hardware attestation, and need no access to the weights themselves. The mechanism does not specify whether prompts and outputs are disclosed to a verifier. It involves no training data. 1 2 12
  • Network taps and certifiers: Only hashes leave the site; records picked for a challenge are opened for replay at a verification facility.
  • Sampled inference recomputation: Recomputation needs the weights and sampled requests inside the checking environment. For closed models, the record describes a trusted, confidential environment; disclosure to the verifier depends on that boundary. 15 24 34
Implementations8 systems
Hardware-attested weight binding
Network taps and certifiers
Sampled inference recomputation
Sources35 cited
  1. How Tinfoil Proves Exactly What Model Is Running, Tinfoil Team (2026). Original
  2. PAL*M: Property Attestation for Large Generative Models, P. Chantasantitam et al. (2026). Original
  3. A primer on secure enclaves, Tinfoil (2026). Original
  4. Backend infrastructure, Tinfoil (2026). Original
  5. How verification works in Tinfoil, Tinfoil (2026). Original
  6. modelwrap: Reproducible dm-verity read-only image of Huggingface models, Tinfoil (2026). Original
  7. TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition, J. Chuang et al. (2026). Original
  8. Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing, J. De Meulemeester et al. (2026). Original
  9. RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP, B. Schlüter & S. Shinde (2025). Original
  10. SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020), AMD (2025). Original
  11. On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
  12. Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments, C. Schnabl et al. (2025). Original
  13. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). Original
  14. The Fundamentals and Feasibility of Secure Network Taps for Verifying AI Datacenter Use, N. Cankaya (2026). Original
  15. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
  16. Verification Plan, R. Dean (2026). Original
  17. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
  18. Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
  19. inference-verification: Inference Verification Prototype, Singapore AI Safety Hub (SASH) (2026). Original
  20. Internationalising AI Verification, Singapore AI Safety Hub (SASH) (2026). Original
  21. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
  22. Network Tapping for AI Verification: A Technical Assessment, Amodo Design (2026). Original
  23. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
  24. DiFR: Inference Verification Despite Nondeterminism, A. Karvonen et al. (2025). Original
  25. TOPLOC: A Locality Sensitive Hashing Scheme for Trustless Verifiable Inference, J. M. Ong et al. (2025). Original
  26. PrimeIntellect-ai/toploc (GitHub repository), Prime Intellect (2025). Original
  27. INTELLECT-2: A Reasoning Model Trained Through Globally Decentralized Reinforcement Learning, Prime Intellect Team et al. (2025). Original
  28. adamkarvonen/difr (GitHub repository), A. Karvonen (2025). Original
  29. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
  30. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
  31. SYNTHETIC-2 Release: Four Million Collaboratively Generated Reasoning Traces, Prime Intellect (2025). Original
  32. An Inference Verification Prototype — Stage 1, Amodo Design (2026). Original
  33. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
  34. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
  35. Network Traffic Hashing, Amodo Design (2026). Original

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24 of 25 mechanisms match · Clear all

Prover

How far can the party being checked be trusted?

The prover is the party being checked. Semi-trusted designs rely on part of its stack: usually the chip vendor's hardware root of trust, its firmware or counters, or its supply-chain records. Adversarial designs aim to hold even if it cheats wherever the checks allow, within their stated assumptions.

Keeps mechanisms whose threat model holds against at least this prover. Adversarial is the strongest assumption. Definitions

Verifier devices on site

May the verifier install its own hardware at the prover's sites?

Some mechanisms need a device the verifier owns or trusts at the prover's facility, such as a network tap, a bandwidth limiter or a sealed sensor. Choose Not allowed when the setting rules that out. Inspectors are not covered.

"Not allowed" removes mechanisms that need a retrofit device, such as a network tap or a sealed sensor. Definitions

Prover cooperation

How much must the prover take part?

Required: the prover takes part, for example by logging requests, producing proofs or opening records. Partial: some access, such as installing a device. Not required: works from outside, such as satellite imagery.

"Partial at most" removes mechanisms that need the prover's active participation. "Not required" keeps only those that work without it. Definitions

Chips

May the proposal depend on new chip designs?

New chip features take years to reach a deployed fleet and cover only chips made after they ship. Mechanisms that use shipping features, such as trusted execution environments or performance counters, stay.

"Existing chips only" removes mechanisms that need changes to future chip designs. Definitions

Minimum development status

Development status

A level describes the public evidence for a mechanism's stated use, not its cost or feasibility. R3 can still have open critical flaws.

Keeps mechanisms whose readiness level is at least this one. Definitions

Attack testing

How hard has each mechanism been attacked in public?

The strongest published attempt to break the mechanism for its verification use: a security analysis, red-teaming by its developers or collaborators, or a red team independent of them.

Keeps mechanisms whose strongest published attack testing is at least this. Definitions

Keep hidden from the verifier

What must the verifier never see? Choose any.

Model weights: the checked model's parameters. Inputs and outputs: the requests a deployed model serves and its responses. Training data: what a model was trained on. Each mechanism's exposure is the editors' reading of its record: shown, depends on the design (kept, with a note), hidden, not involved, or unspecified for a selected implementation. Code and configuration are not covered yet.

Removes mechanisms that show the asset to the verifier. Conditional or unspecified exposure stays with a note and needs checking against the privacy requirement.

Claims

A claim is something one party wants to verify about another party's AI hardware or software. Each claim's number shows how the proposal addresses it.

  • Addressed. A mechanism in the proposal is aimed at this claim and is not excluded by the filters.
  • Partly addressed. Only supporting mechanisms, or mechanisms aimed at it that the filters exclude.
  • Unaddressed. No mechanism in the proposal addresses this claim.

Addressed means a mechanism in the proposal is aimed at the claim and is not excluded by your filters. It does not mean the claim is verified: check its assessed use, development status, security evidence, assumptions and findings.

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Mechanisms

A mechanism is a general technique for verifying claims. Its badge is its development status for its stated use. An optional implementation choice narrows its assumptions, assessed use and claim links to that record. Lines join it to the claims it addresses. Click a line for details.Under its name it lists the claims it is aimed at or supports.

  • Aimed at the claim: verifying it is a direct purpose of the mechanism.
  • Supports the claim: helps verify it without being aimed at it.
  • Faint: excluded by your filters, so it does not count towards claim coverage.

All mechanisms

Overview

One row per mechanism in the proposal. Every mark comes from that mechanism's record, as listed in the panels below; what the verifier sees is the editors' reading of the record's text. Failure counts are per mechanism. Summary counts name mechanisms with open failures, not a sum of attacks. Choosing an implementation narrows each row to that record's assessed use; family findings remain as context. Findings are grouped as known failures, scope limitations and open questions. Only known failures count as failures. Counts are an inventory of published findings, not a risk score.

What the verifier sees

For model weights, inputs and outputs, and training data. This is the editors' reading of each mechanism's record (its threat model, how it works and its limitations), not a field of the record. Shown: the verifier sees it. Depends: on the design or variant, or the verifier sees only samples. Hidden: the verifier sees only commitments, hashes, proofs or results. Not involved: the record does not handle it. Unspecified: the selected implementation has no asset-specific assessment here.

Possible additions

Mechanisms on the map, not in the proposal, that the records connect to an unaddressed or partly addressed claim, an open failure or a dependency. They are pointers, not recommendations: each brings its own readiness level and findings, and none is claimed to close a failure. Links from failures are the editors' reading of the two records.

Start from a published design

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