Proposal Explorer

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Built for an adversarial prover

Bandwidth limits and compartmentalization and Memory wiping and proofs of secure erasure

No new hardware needed

Memory wiping and proofs of secure erasure

Published attempts to break a system, including those that found failures. Testing history does not show that open flaws are resolved.

• Memory wiping and proofs of secure erasure: Analysis

Family findings

• Bandwidth limits and compartmentalization

  Context for AI 2040 inference-only verification stack. These findings concern the family or other implementations; applicability must be checked against their stated scope.

  • Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

    DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. ^{8 9 10}

    Theoretical argument · Significant · Open. On the record

  • Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

    Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. ¹⁰

    Theoretical argument · Significant · Open. On the record

  • Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

    More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. ¹⁰

    Theoretical argument · Significant · Open. On the record

  • Training within one pod is not covered in Bandwidth limits and compartmentalization

    Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. ¹⁰

    Open question · Significant · Open. On the record

  • Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

    In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. ¹¹

    Theoretical argument · Significant · Open. On the record

Open significant flaws

5 flaws in 2 mechanisms

• The recomputation server must be trusted in AI 2040 inference-only verification stack

  The plan calls the integrity of the recomputation server an extremely important aspect, and its argument that sampling verifies all outputs assumes that the server's computations and outputs can be trusted. The companion page notes that the server sits inside the prover's facility, possibly under the prover's physical control, and that hardening it against integrity attacks needs significant research. Amodo rates recomputation-server security as not on track. ^{1 2 4}

  Theoretical argument · Significant · Open. On the record

• Spare compute is not verified in AI 2040 inference-only verification stack

  The plan states that it does not verify that spare compute is unused for unapproved workloads, because this seems very challenging. It relies instead on side-channel bounds and memory wipes, so that the only results that persist are verified inference outputs. ¹

  Theoretical argument · Significant · Open. On the record

• A recomputation family degrades against prompt-controlling adversaries in AI 2040 inference-only verification stack

  The plan's companion page names DiFR among the recomputation schemes being tested. An independent study found that Gumbel-based inference verification, the family that includes Token-DiFR, leaks roughly twice as many bits per token when the adversary chooses prompts that disrupt the text's structure, across six models of 1 to 32 billion parameters. The slowdown it imposes on a hidden-signalling adversary falls from 146–254 times under benign prompts to 60–118 times. The attack weakens the bound on hidden information in outputs, which the plan relies on to keep undeclared results from leaving. ^{1 2 6 7}

  Demonstrated attack · Significant · Open. On the record

• Memory the wipe cannot reach in Memory wiping and proofs of secure erasure

  Amodo's inventory of a GB200 system lists many memory stores beyond GPU HBM and host DRAM. It notes that SSD controller DRAM sits on a private bus that host commands cannot read or write, and that its optimized algorithm leaves 25 GiB of HBM unattested. It also asks how switch memory could be wiped. ^{15 16}

  Open question · Significant · Open. On the record

• Outside help during challenges in Memory wiping and proofs of secure erasure

  Classic proofs of secure erasure assume the device is isolated during the protocol. Bursuc et al. relax this to a bound on how close a helper can be, enforced by round-trip times. In data centres, remote memory access has round trips of about 1–2 µs, against about 70–200 ns for local DRAM. The MIRI overview therefore says verification depends on ruling out RDMA by latency or physical disconnection. ^{13 14}

  Theoretical argument · Significant · Open. On the record

  Related mechanism R2 Timed challenge-response and memory-occupation challenges: Timed challenges bound how far away a helper can be by how quickly it must answer. A pointer, not evidence that this flaw is mitigated. Add

  Related mechanism R1 Bandwidth limits and compartmentalization: Removing or capping links between groups of accelerators limits remote memory access during a challenge. A pointer, not evidence that this flaw is mitigated. In the proposal.

Open minor flaws

1 mechanism with minor findings

• Gap between erased and total memory in Memory wiping and proofs of secure erasure

  Bursuc et al. note that memory left between the erased region and the device's full memory could hold data, and that their bounds are tighter only against a restricted adversary. ¹³

  Theoretical argument · Minor · Open. On the record

Not yet demonstrated

R1 Bandwidth limits and compartmentalization and R1 Memory wiping and proofs of secure erasure

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• R2 Timed challenge-response and memory-occupation challenges Add
  • Bears on the open significant flaw “Outside help during challenges” in Memory wiping and proofs of secure erasure. Timed challenges bound how far away a helper can be by how quickly it must answer.
  • Memory wiping and proofs of secure erasure waits on it. Timed challenges must exclude remote memory and other helpers.
• R2 Tamper evidence for verifier devices Add
  • Bandwidth limits and compartmentalization waits on it. Checking that taps are correctly installed and stay in place at scale is not a solved problem, and hardening the recomputation server inside the prover's facility needs significant research.
• R1 Network taps and certifiers Add
  • Bandwidth limits and compartmentalization waits on it. Passive optical taps work at 400G, but the 800G and 1600G line rates now arriving in data centres are undemonstrated.
• R1 Side-channel suppression for isolated facilities Add
  • Bandwidth limits and compartmentalization waits on it. There is no plan yet for quickly scaling side-channel defences on a frontier cluster; only early theoretical pieces exist.
• R1 Whole-workload recomputation (reproducible packets) Add
  • Bandwidth limits and compartmentalization waits on it. A fully reproducible inference stack needs substantial software and tooling, and per-packet network reproducibility may need considerable software, firmware and possibly hardware work.
• R3 Sampled inference recomputation Add
  • Bandwidth limits and compartmentalization depends on it.

Missing prerequisites

• R3 Sampled inference recomputation needed by Bandwidth limits and compartmentalization Add
• R1 Whole-workload recomputation (reproducible packets) needed by Bandwidth limits and compartmentalization Add
• R2 Timed challenge-response and memory-occupation challenges needed by Memory wiping and proofs of secure erasure Add

Blockers

9 blockers recorded

• Bandwidth limits and compartmentalization
  • A fully reproducible inference stack needs substantial software and tooling, and per-packet network reproducibility may need considerable software, firmware and possibly hardware work. Performance & compatibility. Waits on Whole-workload recomputation (reproducible packets) ²
  • Passive optical taps work at 400G, but the 800G and 1600G line rates now arriving in data centres are undemonstrated. Performance & compatibility. Waits on Network taps and certifiers ²
  • Checking that taps are correctly installed and stay in place at scale is not a solved problem, and hardening the recomputation server inside the prover's facility needs significant research. Hardware trust. Waits on Tamper evidence for verifier devices ^{2 4}
  • There is no plan yet for quickly scaling side-channel defences on a frontier cluster; only early theoretical pieces exist. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ²
  • Memory wiping may use existing algorithms, but hardware testing is at an early stage. Coverage & hidden compute. Waits on Memory wiping and proofs of secure erasure ²
  • Robust red-teaming of recomputation schemes has not started, and most algorithm development remains academic. Adversarial validation ^{2 4}
• Memory wiping and proofs of secure erasure
  • Wipes take time: tens of minutes for a pod's volatile memory and hours for SSDs, displacing work. Performance & compatibility ^{14 15 16}
  • Timed challenges must exclude remote memory and other helpers. Coverage & hidden compute. Waits on Timed challenge-response and memory-occupation challenges ^{13 14}
  • All memory stores in a system must be inventoried and wiped at the same time. Coverage & hidden compute ¹⁵

From the family or selected implementation's record. ?

Model weights

Not involved: Memory wiping and proofs of secure erasure.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Inputs and outputs

Not involved: Memory wiping and proofs of secure erasure.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Training data

Not involved: Memory wiping and proofs of secure erasure.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Bandwidth limits and compartmentalization

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• R1 RAND secure inference data center (SIDC) design Proposed architecture, RAND

Memory wiping and proofs of secure erasure

• R1 AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• R1 Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute

1. Verification Plan, R. Dean (2026). Original
2. Get Involved in Verification, AI Futures Project (2026). Original
3. Verifying international AI deals: Plan A, the state-of-play, and what you can do to help, T. Milton et al. (2026). Original
4. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
5. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
6. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
7. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
8. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
9. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
10. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
11. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
12. Secure Code Update for Embedded Devices via Proofs of Secure Erasure, D. Perito & G. Tsudik (2010). Original
13. Software-Based Memory Erasure with Relaxed Isolation Requirements, S. Bursuc et al. (2024). Original
14. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
15. Memory Wipes - Performance Analysis, Amodo Design (2026). Original
16. Improving Disk Wiping Speed for Memory Wipes, Amodo Design (2026). Original
17. Amodo-Design/PoSE-Memory-Wiping (GitHub repository), Amodo Design (2026). Original
18. Empirical Evaluation of Memory-Erasure Protocols, R. Gil-Pons et al. (2025). Original