Proposal Explorer

Add claims to see which ones the mechanisms address.

Operational use

• Operational use Sampled inference recomputation for checking untrusted workers' activations against the declared model, prompt and precision

Built for an adversarial prover

Network taps and certifiers, Sampled inference recomputation and Tamper evidence for verifier devices

No new hardware needed

Safeguard attestation and Sampled inference recomputation

Failures since mitigated

• Verifier dictionary attacks on hashes in Network taps and certifiers ¹⁴

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

• Safeguard attestation: Analysis
• Network taps and certifiers: Analysis
• Sampled inference recomputation: Analysis
• Tamper evidence for verifier devices: Analysis

Open significant failures

8 failures in 4 mechanisms

• Components outside the attested boundary in Safeguard attestation

  In the proof-of-guardrail experiments, the guardrail model and the agent's backend model were both reached through external APIs, and the authors leave the decision to trust those APIs to the verifier. The measured wrapper must also have no vulnerability that lets the unmeasured agent bypass the guardrail, for example by executing arbitrary commands inside the enclave. The code's README states that the enclave does not currently restrict the agent's arbitrary command execution, which could be used to bypass guardrails. ^{1 2}

  Known failure · Theoretical argument · Significant · Open. On the record

• Memory-bus interposition extracts attestation keys and forges attestations in Safeguard attestation

  Applies to variants using the affected Intel or AMD trust roots. PAL*M excludes physical attacks. A TDX-backed safeguard claim against a physical host attacker would be defeated, but these studies do not demonstrate a break of the AWS Nitro proof-of-guardrail prototype or of verifier-side recomputation.

  The TEE findings cover DDR5 attacks on Intel TDX, the H100 relay demonstration, DDR4 attacks on AMD SEV-SNP, and software-only SEV-SNP forgery before AMD's fixes. These are inherited hardware limits; a governance analysis explains why physical access matters in a treaty setting. ^{1 4 7 8 9 10 11 12 13}

  Response: Intel and AMD place the physical attack class outside their threat models, according to the researchers. AMD reports firmware fixes for RMPocalypse.

  Known failure · Demonstrated attack · Significant · Open · Inherited finding. On the record · Related finding in TEE remote attestation for AI workloads

  Related mechanism Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors: A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically. A pointer, not evidence that this failure is mitigated. Add

• Output nondeterminism leaves covert capacity in Network taps and certifiers

  Hashing cannot remove information hidden in the outputs themselves. The Secure Gateway Device paper estimates that about 0.1 bit per token remains even with seed-synchronized replay checks. For a 200k-GPU inference cluster at full load (2,000 tokens per GPU per second), that is about 40 Mbit/s of covert egress, enough to move a 1 TB model in under three days. The paper names this the core remaining challenge and points to deterministic replay or active scrubbing of hardware-induced entropy. An independent study found that an adversary who chooses the prompts roughly doubles the bits leaked per token under Gumbel-based inference verification; see Bounding unexplained information in outputs. ^{14 21}

  Known failure · Theoretical argument · Significant · Open. On the record

  Related mechanism Operational use Deterministic and bit-exact inference: Deterministic replay is one of the two remedies the flaw's source names. A pointer, not evidence that this failure is mitigated. Add

  Related mechanism Research demo Bounding unexplained information in outputs: Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict. A pointer, not evidence that this failure is mitigated. Add

• Residual side channels in simple passive setups in Network taps and certifiers

  Amodo's analysis of its own tapped prototype lists unvalidated header fields, timing of permitted traffic and variation in response formatting as residual channels, and concludes that the passive tap must be replaced by an active one. ¹⁷

  Known failure · Theoretical argument · Significant · Open. On the record

• Tolerance for numerical noise leaves a covert channel in Sampled inference recomputation

  Schemes that accept approximate matches can put an upper bound on an adversary's covert bandwidth, but they cannot close the channel. The weight-exfiltration detector cut exfiltratable information to under 0.5%, not to zero, on a 30-billion-parameter mixture-of-experts model under benign prompt traffic. Its authors called the channel's size under adversarial prompts an open empirical question. An independent study showed that an adversary who controls the prompts roughly doubles the bits leaked per token. Across six models, that cut the slowdown from 146–254 times under benign prompts to 60–118 times. The attack widens the exfiltration bound. It does not target the check that outputs match the declared model. ^{21 23 33}

  Known failure · Demonstrated attack · Significant · Open. On the record

  Related mechanism Operational use Deterministic and bit-exact inference: Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration. A pointer, not evidence that this failure is mitigated. Add

• Some inference optimizations are not covered in Sampled inference recomputation

  TOPLOC's authors state that it cannot detect speculative decoding in which a cheaper model does the decoding. They did not test whether it distinguishes types of key-value (KV) cache compression. DiFR was evaluated only on sampling from a single model. Its authors sketch an extension to one speculative-decoding algorithm but do not test it. ^{24 25}

  Known failure · Theoretical argument · Significant · Open. On the record

• Seals are often defeated with simple methods in Tamper evidence for verifier devices

  Published defeats of general security seals. They warn about proposed verifier-device seals, but do not demonstrate defeat of an AI verification enclosure or sensor.

  In 1996 a Los Alamos vulnerability assessment defeated all 94 security seals it examined, with 132 defeats in total, using rapid, inexpensive, low-tech methods. It found that seal cost did not predict security. In 2001 Johnston reported that high-tech seals are often easier to defeat than low-tech ones. ^{41 42}

  Known failure · Demonstrated attack · Significant · Open · Mechanism-class evidence. On the record

• Attack classes outside published models in Tamper evidence for verifier devices

  The radio compensation result is emulated using measured channel data under a known-reference attacker model. It is not a physical bypass demonstration against an AI verifier enclosure.

  The authors of the batteryless cover say they cannot assess chemical-solvent attacks, which exceed their expertise, and deem cover removal impractical. Anti-Tamper Radio's reference can drift as the environment or measurement system ages; the authors suggest gradually renewing the reference. A 2025 follow-up by some of the same authors shows, by emulation on measured channel data, that an attacker who knows the reference channel and the needle's effect on it could inject a signal that cancels the change caused by a needle insertion. It proposes a reconfigurable intelligent surface that randomizes the channel as a countermeasure. ^{35 36 43}

  Known failure · Open question · Significant · Open · Mechanism-class evidence. On the record

Scope limitations

• Attestation shows a safeguard ran, not that it is effective in Safeguard attestation

  Proof of guardrail ensures that the guardrail executed, but the guardrail can still err or be jailbroken. Because the guardrail must be open source, a malicious developer can attack it with jailbreaks while still presenting a valid proof. In the authors' evaluation, Llama Guard 3 reached an F1 score of 0.56 on the unsafe class of the ToxicChat dataset. The authors state that proof of guardrail should not be interpreted or advertised as proof of safety. ¹

  Scope limitation · Theoretical argument. On the record

• Selective attestation leaves traffic uncovered in Safeguard attestation

  Attestations are issued per response. In the prototype, the agent offers them when it receives high-stakes questions, so nothing shows that unattested traffic went through the same path. PAL*M's authors note that a prover could cherry-pick favourable executions, and suggest verifier-published nonces or requesting only session-level proofs. A governance analysis notes that auditors also need assurance that all activity is accounted for, since a host could start a second confidential virtual machine that bypasses monitoring. ^{1 4 9}

  Scope limitation · Theoretical argument. On the record

  Related mechanism Research demo On-chip telemetry from timing, memory and performance counters: On-chip counters are a proposed route to evidence about everything a chip runs, including a second virtual machine that skips the safeguard. A pointer, not evidence that this failure is mitigated. Add

• Measurements may omit behaviour-relevant configuration or runtime changes in Safeguard attestation

  Every component that influences inference behaviour must be covered by the launch measurement, including feature flags, environment variables and invocation arguments. A launch measurement also does not show that a program keeps running as measured if the kernel is later compromised. ⁹

  Scope limitation · Theoretical argument. On the record

• Some links cannot be passively tapped in Network taps and certifiers

  Cankaya notes that copper-connected scale-up domains (for example NVL72 racks and TPU v7 cubes) are much harder to tap than fibre, and that optical budgets make passive taps impractical on 400GBASE-SR8 multimode links. Amodo found no taps advertised for 53 GBaud links as of May 2026. ^{15 22}

  Scope limitation · Open question. On the record

• Encrypted fabrics hide plaintext from both parties in Network taps and certifiers

  Cankaya notes that with TEE-protected sessions whose keys are ephemeral and managed inside the TEE, neither the operator nor the manufacturer can recover session keys after the session, so tapped traffic could not be opened for recomputation. For other encrypted fabrics, the operator can retain keys. ¹⁵

  Scope limitation · Open question. On the record

• Completeness rests on physical monitoring left out of scope in Network taps and certifiers

  The Secure Gateway Device paper assumes the facility is physically monitored, and states that the whole architecture depends on the device being the only communication channel. It names radio emanation, power-line signalling and thermal channels as covert channels beyond that scope. ¹⁴

  Scope limitation · Open question. On the record

  Related mechanism Proposed Side-channel suppression for isolated facilities: Addresses the radio, power-line and thermal channels that network-level designs leave out. A pointer, not evidence that this failure is mitigated. Add

• Only recorded traffic is checked in Sampled inference recomputation

  Recomputation checks that recorded, declared workloads are correct. It cannot show that the record is complete. The published schemes do not cover hidden workloads run on the same compute, or substituted work. Rinberg et al. say their exfiltration-detection scheme cannot stand alone. ^{23 34}

  Scope limitation · Theoretical argument. On the record

  Related mechanism Proposed Network taps and certifiers: Taps copy and hash all traffic on the monitored links, which bears on whether the traffic record is complete. They do not show what else ran on the same chips. A pointer, not evidence that this failure is mitigated. In the proposal.

• Security depends on inspection protocols in Tamper evidence for verifier devices

  An inspection and protocol requirement drawn from safeguards and enclosure studies, not a reported break of a deployed AI verifier.

  Johnston argues that a seal is no better than the protocols for using it, and that inspectors are usually given little useful information on how to detect tampering. The Sandia survey notes that larger enclosures are hard to inspect fully and that sensor data must be authenticated. ^{40 42}

  Scope limitation · Theoretical argument · Mechanism-class evidence. On the record

Open minor failures

1 mechanism with minor failures

• Mixed hardware widens the honest baseline in Sampled inference recomputation

  When honest reference runs span different GPU types, the spread of benign scores grows. In DiFR's tests on Qwen3-30B-A3B, pooling A100 and H200 runs left Token-DiFR unable to separate the two smallest tested changes, a temperature of 1.1 instead of 1.0 and a simulated top-2 sampling bug, at the target false-positive rate, while cross-entropy separated them. Matched provider and verifier environments, or pooling that weights rare large deviations, restored detection. ²⁴

  Known failure · Open question · Minor · Open. On the record

Not yet demonstrated

Proposed Network taps and certifiers

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• Operational use Deterministic and bit-exact inference Add
  • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Deterministic replay is one of the two remedies the flaw's source names.
  • Bears on the open significant failure “Tolerance for numerical noise leaves a covert channel” in Sampled inference recomputation. Bit-exact inference would remove the numerical tolerance if exact replay can be deployed with the required weights and configuration.
  • Network taps and certifiers waits on it. Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove.
• Research demo Bounding unexplained information in outputs Add
  • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict.
• Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors Add
  • Bears on the open significant failure “Memory-bus interposition extracts attestation keys and forges attestations” in Safeguard attestation. A tamper-protected enclosure around the chip is the proposed answer when the party that holds the hardware may attack it physically.
• Operational use Hardware-attested weight binding Add
  • Safeguard attestation waits on it. Safeguard evidence must be bound to the model actually served, which depends on model-identity attestation.
• Operational use TEE remote attestation for AI workloads Add
  • Safeguard attestation waits on it. Frontier model inference typically needs several GPUs, GPU confidential computing is less mature than CPU support, and CPU inference, which an enclave prototype had to use, ran about 100 times slower than GPU inference.
  • Safeguard attestation waits on it. Trust rests on a small number of hardware vendors, and a per-CPU Intel attestation key has been extracted by physical attack.
• Proposed Side-channel suppression for isolated facilities Add
  • Network taps and certifiers waits on it. Radio, power-line and thermal channels are not addressed by network-level designs.

Missing prerequisites

• Operational use TEE remote attestation for AI workloads needed by Safeguard attestation Add
• Operational use Hardware-attested weight binding needed by Safeguard attestation Add
• Operational use Deterministic and bit-exact inference needed by Network taps and certifiers Add
• Proposed Side-channel suppression for isolated facilities needed by Network taps and certifiers Add

Blockers

19 blockers recorded

• Safeguard attestation
  • No published design shows that all of a provider's traffic passes through the attested safeguard path; current evidence covers individual attested responses. Coverage & hidden compute ^{1 9}
  • Frontier model inference typically needs several GPUs, GPU confidential computing is less mature than CPU support, and CPU inference, which an enclave prototype had to use, ran about 100 times slower than GPU inference. Performance & compatibility. Waits on TEE remote attestation for AI workloads ^{9 44}
  • Trust rests on a small number of hardware vendors, and a per-CPU Intel attestation key has been extracted by physical attack. Hardware trust. Waits on TEE remote attestation for AI workloads ^{7 9}
  • Safeguard evidence must be bound to the model actually served, which depends on model-identity attestation. Evidence binding. Waits on Hardware-attested weight binding ^{44 45}
  • No independent red-team or audit of a safeguard-attestation system has been published, and the available prototypes are described by their authors as proofs of concept that have not been stress-tested by a counterparty. Adversarial validation ^{2 6}
• Network taps and certifiers
  • No complete verification tap has been demonstrated at production frontend link rates, and on the tested CPU no hash algorithm reached line rate with minimum-size frames. Performance & compatibility ^{22 46}
  • Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove. Evidence binding. Waits on Deterministic and bit-exact inference ¹⁴
  • Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them. Hardware trust. Waits on Tamper evidence for verifier devices ^{13 14}
  • Radio, power-line and thermal channels are not addressed by network-level designs. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ¹⁴
  • Red-teaming by specialists is called for but has not been reported. Adversarial validation ¹⁴
• Sampled inference recomputation
  • In tap-based retrofit designs, recording all inference traffic needs network taps and recomputation servers that can ingest it, in the worst case one recomputation-server network interface per inference front-end interface. Coverage & hidden compute. Waits on Network taps and certifiers ^{16 30}
  • In retrofit designs, the recomputation server must sit inside the prover's data centre, possibly under the prover's physical control, and still be protected from a compromised provider, which Amodo rates 'not on track'. Hardware trust ^{23 30}
  • No independent red-team of a recomputation consistency check has been published (the one independent attack study targets the weight-exfiltration bound), and Amodo rates recomputation red-teaming 'not started'. Adversarial validation ^{21 30}
  • Tolerance-based checks need calibration on trusted hardware and exact knowledge of the provider's sampling procedure, and in one prototype a sampling-implementation mismatch produced large spurious differences. Performance & compatibility ^{24 29}
  • The verifier needs the model weights, so checking a closed-weights model requires a trusted, confidential recomputation environment, which the retrofit designs place inside the prover's facility. Privacy & leakage ^{13 24 34}
• Tamper evidence for verifier devices
  • No tamper-evident enclosure has been designed for AI verifier hardware at retrofit scale. Hardware trust ¹³
  • Battery-backed designs add bulk, limit operating temperature (+10 °C to +35 °C for the IBM 4765) and complicate transport. Performance & compatibility ³⁶
  • Active monitoring needs power, and visual inspection of large enclosures faces access limits. Access & governance ⁴⁰
  • No evaluation has been published in the AI verification setting. Adversarial validation ¹³

From the family or selected implementation's record. ?

Model weights

Depends on the design for Safeguard attestation, Network taps and certifiers and Sampled inference recomputation.

Not involved: Tamper evidence for verifier devices.

Inputs and outputs

Depends on the design for Safeguard attestation, Network taps and certifiers and Sampled inference recomputation.

Not involved: Tamper evidence for verifier devices.

Training data

Depends on the design for Network taps and certifiers.

Not involved: Safeguard attestation, Sampled inference recomputation and Tamper evidence for verifier devices.

Safeguard attestation

None on the map

Network taps and certifiers

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)

Sampled inference recomputation

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Research demo DiFR (Divergence From Reference) Research prototype
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)
• Operational use TOPLOC Open-source project, Prime Intellect

Tamper evidence for verifier devices

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project

1. Proof-of-Guardrail in AI Agents and What (Not) to Trust from It, X. Jin et al. (2026). Original
2. Verifiable-ClawGuard: proof-of-guardrail reference code, SaharaLabsAI (2026). Original
3. Safety Without Compromising on Privacy, D. McCann-Sayles et al. (2026). Original
4. PAL*M: Property Attestation for Large Generative Models, P. Chantasantitam et al. (2026). Original
5. Enabling Verifiably-Scoped Monitoring through Large Language Models and Trusted Compute, B. Penchas et al. (2026). Original
6. Auditor-in-a-Box: Tools for Third-Party Auditing, R. Rinberg & B. Penchas (2026). Original
7. TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition, J. Chuang et al. (2026). Original
8. DDRop: Active Memory Interposer Attacks on Confidential VMs by Dropping DDR5 Writes, J. De Meulemeester et al. (2026). Original
9. On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
10. Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing, J. De Meulemeester et al. (2026). Original
11. RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP, B. Schlüter & S. Shinde (2025). Original
12. SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020), AMD (2025). Original
13. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
14. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). Original
15. The Fundamentals and Feasibility of Secure Network Taps for Verifying AI Datacenter Use, N. Cankaya (2026). Original
16. Verification Plan, R. Dean (2026). Original
17. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
18. Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
19. inference-verification: Inference Verification Prototype, Singapore AI Safety Hub (SASH) (2026). Original
20. Internationalising AI Verification, Singapore AI Safety Hub (SASH) (2026). Original
21. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
22. Network Tapping for AI Verification: A Technical Assessment, Amodo Design (2026). Original
23. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
24. DiFR: Inference Verification Despite Nondeterminism, A. Karvonen et al. (2025). Original
25. TOPLOC: A Locality Sensitive Hashing Scheme for Trustless Verifiable Inference, J. M. Ong et al. (2025). Original
26. PrimeIntellect-ai/toploc (GitHub repository), Prime Intellect (2025). Original
27. INTELLECT-2: A Reasoning Model Trained Through Globally Decentralized Reinforcement Learning, Prime Intellect Team et al. (2025). Original
28. adamkarvonen/difr (GitHub repository), A. Karvonen (2025). Original
29. Scaling Recomputation Inference Verification, Amodo Design (2026). Original
30. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
31. SYNTHETIC-2 Release: Four Million Collaboratively Generated Reasoning Traces, Prime Intellect (2025). Original
32. An Inference Verification Prototype — Stage 1, Amodo Design (2026). Original
33. Bit-Exact AI Inference Verification Without Performance Tradeoffs, N. Cankaya (2026). Original
34. Example Schemes for Verifying High-Stakes AI Agreements, Amodo Design (2026). Original
35. Anti-Tamper Radio: System-Level Tamper Detection for Computing Systems, P. Staat et al. (2022). Original
36. Secure Physical Enclosures from Covers with Tamper-Resistance, V. Immler et al. (2019). Original
37. ImpedanceVerif: On-Chip Impedance Sensing for System-Level Tampering Detection, T. Mosavirik et al. (2023). Original
38. IBM 4765 Cryptographic Coprocessor Security Module: Security Policy, IBM Corporation (2012). Original
39. PHYSEC SEAL: Change detection for maximum safety, PHYSEC GmbH (2026). Original
40. Tamper-Indicating Enclosures, A Current Survey, H. A. Smartt & Z. N. Gastelum (2015). Original
41. Physical Security and Tamper-Indicating Devices, R. G. Johnston & A. R. E. Garcia (1996). Original
42. Tamper Detection for Safeguards and Treaty Monitoring: Fantasies, Realities, and Potentials, R. G. Johnston (2001). Original
43. Anti-Tamper Radio Meets Reconfigurable Intelligent Surface for System-Level Tamper Detection, M. S. Tabar et al. (2025). Original
44. Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments, C. Schnabl et al. (2025). Original
45. How Tinfoil Proves Exactly What Model Is Running, Tinfoil Team (2026). Original
46. Network Traffic Hashing, Amodo Design (2026). Original