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Mechanism · Timed challenge-response and memory-occupation challenges

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  1. BN. Cankaya (2026). A System Overview for Near-Term, Low-Trust AI Compute Verification. Machine Intelligence Research Institute. Source recordSupports: memory challenging for presence and absence; response-time domains; latencies; fill times; RDMA caveat; pre-staging; not yet demonstrated at network level · §5.1.2
  2. CR. Dean (2026). Verification Plan. AI 2040. Source recordSupports: memory-challenge verification and low-latency challenges as alternative directions · verification overview; other promising directions
  3. BS. K. Monfared et al. (2026). Timing and Memory Telemetry on GPUs for AI Governance. arXiv. Source recordSupports: PoW, VDF, GEMM and VRAM-residency probes; contention results on T4 and H100; H100 residency result; threat model; overhead; FP/FN caveat · abstract; §4–§6; limitations
  4. AA. Ivanov et al. (2023). SAGE: Software-based Attestation for GPU Execution. 2023 USENIX Annual Technical Conference (USENIX ATC 23), pp. 485–499. Source recordSupports: software-based attestation on A100 GPUs · abstract
  5. AA. Seshadri et al. (2004). SWATT: SoftWare-based ATTestation for Embedded Devices. IEEE Symposium on Security and Privacy 2004, pp. 272–282. Source recordSupports: timed checksum attestation; verifier knowledge requirements · abstract; design sections
  6. AC. Castelluccia et al. (2009). On the Difficulty of Software-Based Attestation of Embedded Devices. Proceedings of the 16th ACM Conference on Computer and Communications Security (CCS 2009), pp. 400–409. Source recordSupports: demonstrated attacks on timed attestation; conclusions · abstract; §3–§5
  7. BA. Perrig & L. van Doorn (2010). Refutation of "On the Difficulty of Software-Based Attestation of Embedded Devices". Technical note (CyLab, Carnegie Mellon University). Source recordSupports: designers' reply: rootkit attack on a naive implementation; SWATT attack on a larger-memory re-implementation; ICE attack accepted · §2.1–§2.3
  8. AS. Dziembowski et al. (2015). Proofs of Space. CRYPTO 2015 (IACR Cryptology ePrint Archive 2013/796). Source recordSupports: proofs of space: dedicating disk space instead of computation; construction · abstract
  9. AS. Bursuc et al. (2024). Software-Based Memory Erasure with Relaxed Isolation Requirements. 2024 IEEE 37th Computer Security Foundations Symposium (CSF 2024). Source recordSupports: timed rounds with a round-trip bound in PoSE; peer-reviewed timed PoSE · §3
  10. CAmodo Design (2026). Memory Wipes - Performance Analysis. Amodo Design. Source recordSupports: challenge phase of a PoSE implementation; 1 ms RTT assumption · protocol section
  11. AD. Perito & G. Tsudik (2010). Secure Code Update for Embedded Devices via Proofs of Secure Erasure. Computer Security – ESORICS 2010, LNCS 6345, pp. 643–662. Source recordSupports: peer-reviewed proofs of secure erasure; weaknesses of timed software attestation as motivation · abstract

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