Proposal Explorer

Add claims to see which ones the mechanisms address.

Built for an adversarial prover

Network taps and certifiers and Bandwidth limits and compartmentalization

No new hardware needed

On-chip telemetry from timing, memory and performance counters

Failures since mitigated

• Verifier dictionary attacks on hashes in Network taps and certifiers ¹

Attack testing records published testing for this use. It does not by itself show independent review, a formal proof or that a deployed system is secure.

• Network taps and certifiers: Analysis
• On-chip telemetry from timing, memory and performance counters: Red-teamed

Family findings

• Bandwidth limits and compartmentalization

  Context for AI 2040 inference-only verification stack. Findings from the mechanism family appear here as context. They apply to an implementation only when its own record lists them, under the conditions stated there.

  • Low-communication training reduces the bandwidth training needs in Bandwidth limits and compartmentalization

    DiLoCo matched fully synchronous training on 8 workers while communicating 500 times less. Rahman writes that this family of methods theoretically allows large-scale training with less than 100 Mbps. Lucid includes these methods in its bounds, but notes that extreme activation compression, architectures with unusually small inter-layer widths, or modular paradigms could erode the margin. ^{20 21 22}

    Open question · Theoretical argument. On the record

  • Operator control of pod routing collapses the bound in Bandwidth limits and compartmentalization

    Lucid's analysis finds that if the operator can freely assign pods to routers, it could dedicate a whole cell of 100 or more pods to one pipeline stage. The bound then falls to about 90–220x uncompressed and as low as about 25x with compression. The proposed mitigation, auditor-controlled random assignment that is periodically re-randomized, has not been implemented. ²²

    Known failure · Theoretical argument · Significant · Open. On the record

  • Undeclared local storage raises per-pod capacity in Bandwidth limits and compartmentalization

    More memory or storage per pod helps an adversary. Lucid requires per-pod storage to be declared, capped and physically inspected. ²²

    Scope limitation · Theoretical argument. On the record

  • Training within one pod is not covered in Bandwidth limits and compartmentalization

    Lucid's bounds concern pre-training models larger than the pods are sized for. Training models that fit in one pod, fine-tuning and reinforcement-learning post-training within one pod are outside the modelled threat. ²²

    Scope limitation · Open question. On the record

  • Parallel scale-up switches are hard enforcement points in Bandwidth limits and compartmentalization

    In GB200 topologies, GPUs reach GPUs in other nodes through NVSwitches without a NIC on the path. Amodo notes that limits are hard to enforce there because many switches work in parallel, so compromising one or two would bypass the limit. ²³

    Known failure · Theoretical argument · Significant · Open. On the record

Open significant failures

5 failures in 3 mechanisms

• Output nondeterminism leaves covert capacity in Network taps and certifiers

  Hashing cannot remove information hidden in the outputs themselves. The Secure Gateway Device paper estimates that about 0.1 bit per token remains even with seed-synchronized replay checks. For a 200k-GPU inference cluster at full load (2,000 tokens per GPU per second), that is about 40 Mbit/s of covert egress, enough to move a 1 TB model in under three days. The paper names this the core remaining challenge and points to deterministic replay or active scrubbing of hardware-induced entropy. An independent study found that an adversary who chooses the prompts roughly doubles the bits leaked per token under Gumbel-based inference verification; see Bounding unexplained information in outputs. ^{1 9}

  Known failure · Theoretical argument · Significant · Open. On the record

  Related mechanism Operational use Deterministic and bit-exact inference: Deterministic replay is one of the two remedies the flaw's source names. A pointer, not evidence that this failure is mitigated. Add

  Related mechanism Research demo Bounding unexplained information in outputs: Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict. A pointer, not evidence that this failure is mitigated. Add

• Residual side channels in simple passive setups in Network taps and certifiers

  Amodo's analysis of its own tapped prototype lists unvalidated header fields, timing of permitted traffic and variation in response formatting as residual channels, and concludes that the passive tap must be replaced by an active one. ⁵

  Known failure · Theoretical argument · Significant · Open. On the record

• Adversarially disguised fine-tuning partly evades classification in On-chip telemetry from timing, memory and performance counters

  Across 20 evasion strategy families in five monitor-evader rounds, the classifier's accuracy against the most challenging disguised workloads held out from training was 43–87%. White-box LoRA fine-tuning was the only evasion family detected less than half the time. The evaluation covered single nodes, PyTorch-level evasion and NVIDIA hardware. ¹³

  Known failure · Demonstrated attack · Significant · Open. On the record

• Counters leak information about protected workloads in On-chip telemetry from timing, memory and performance counters

  Performance counters have been used as a side channel against TEEs, for example in CounterSEVeillance. NVIDIA disables performance counters in full confidential-computing mode, stating that they could provide an avenue for side-channel attacks. Richer counters for verification therefore pull against confidentiality. ^{14 15}

  Known failure · Theoretical argument · Significant · Open. On the record

• A recomputation family degrades against prompt-controlling adversaries in AI 2040 inference-only verification stack

  The plan's companion page names DiFR among the recomputation schemes being tested. An independent study found that Gumbel-based inference verification, the family that includes Token-DiFR, leaks roughly twice as many bits per token when the adversary chooses prompts that disrupt the text's structure, across six models of 1 to 32 billion parameters. The slowdown it imposes on a hidden-signalling adversary falls from 146–254 times under benign prompts to 60–118 times. The attack weakens the bound on hidden information in outputs, which the plan relies on to keep undeclared results from leaving. ^{4 9 16 19}

  Known failure · Demonstrated attack · Significant · Open. On the record

Scope limitations

• Some links cannot be passively tapped in Network taps and certifiers

  Cankaya notes that copper-connected scale-up domains (for example NVL72 racks and TPU v7 cubes) are much harder to tap than fibre, and that optical budgets make passive taps impractical on 400GBASE-SR8 multimode links. Amodo found no taps advertised for 53 GBaud links as of May 2026. ^{2 10}

  Scope limitation · Open question. On the record

• Encrypted fabrics hide plaintext from both parties in Network taps and certifiers

  Cankaya notes that with TEE-protected sessions whose keys are ephemeral and managed inside the TEE, neither the operator nor the manufacturer can recover session keys after the session, so tapped traffic could not be opened for recomputation. For other encrypted fabrics, the operator can retain keys. ²

  Scope limitation · Open question. On the record

• Completeness rests on physical monitoring left out of scope in Network taps and certifiers

  The Secure Gateway Device paper assumes the facility is physically monitored, and states that the whole architecture depends on the device being the only communication channel. It names radio emanation, power-line signalling and thermal channels as covert channels beyond that scope. ¹

  Scope limitation · Open question. On the record

  Related mechanism Proposed Side-channel suppression for isolated facilities: Addresses the radio, power-line and thermal channels that network-level designs leave out. A pointer, not evidence that this failure is mitigated. Add

• Software-read telemetry can be forged by the operator in On-chip telemetry from timing, memory and performance counters

  NVML-based classification assumes trustworthy telemetry. Without a tamper-resistant read path, an authenticated telemetry channel and secure boot of the monitoring software, an operator who controls the full software stack could forge counter values. Monfared et al. start from the same premise: current GPUs expose little trusted telemetry and can be modified or virtualized. ^{11 13}

  Scope limitation · Theoretical argument. On the record

  Related mechanism Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors: A guarantee processor on the chip would give the tamper-resistant, authenticated telemetry path the flaw says is missing. A pointer, not evidence that this failure is mitigated. Add

• Timing challenges do not identify the individual chip in On-chip telemetry from timing, memory and performance counters

  GEMM and VDF challenges can be answered by identical GPUs elsewhere, and floating-point fingerprints distinguish GPU models, not individual devices. GPU virtualization adds timing leakage that prevents attributing compute use. ¹¹

  Scope limitation · Theoretical argument. On the record

• The recomputation server must be trusted in AI 2040 inference-only verification stack

  The plan calls the integrity of the recomputation server an extremely important aspect, and its argument that sampling verifies all outputs assumes that the server's computations and outputs can be trusted. The companion page notes that the server sits inside the prover's facility, possibly under the prover's physical control, and that hardening it against integrity attacks needs significant research. Amodo rates recomputation-server security as not on track. ^{4 16 18}

  Scope limitation · Theoretical argument. On the record

• Spare compute is not verified in AI 2040 inference-only verification stack

  The plan states that it does not verify that spare compute is unused for unapproved workloads, because this seems very challenging. It relies instead on side-channel bounds and memory wipes, so that the only results that persist are verified inference outputs. ⁴

  Scope limitation · Theoretical argument. On the record

Open questions

• No quantified error rates or formal thresholds for timing primitives in On-chip telemetry from timing, memory and performance counters

  Monfared et al. state that false-positive and false-negative rates are not quantified and leave hardware-specific formal thresholds to future work. ¹¹

  Open question · Open question. On the record

Not yet demonstrated

Proposed Network taps and certifiers and Proposed Bandwidth limits and compartmentalization

Mechanisms on the map that are not in the proposal. Pointers, not recommendations. ?

• Operational use Deterministic and bit-exact inference Add
  • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Deterministic replay is one of the two remedies the flaw's source names.
  • Network taps and certifiers waits on it. Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove.
• Research demo Bounding unexplained information in outputs Add
  • Bears on the open significant failure “Output nondeterminism leaves covert capacity” in Network taps and certifiers. Bounds the hidden information outputs can carry by measuring what the declared computation fails to predict.
• Research demo Tamper evidence for verifier devices Add
  • Network taps and certifiers waits on it. Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them.
  • Bandwidth limits and compartmentalization waits on it. Checking that taps are correctly installed and stay in place at scale is not a solved problem, and hardening the recomputation server inside the prover's facility needs significant research.
• Proposed Hardware-enabled guarantees (flexHEG) and guarantee processors Add
  • On-chip telemetry from timing, memory and performance counters waits on it. Shipping accelerators need a tamper-resistant, authenticated telemetry path.
• Proposed Memory wiping and proofs of secure erasure Add
  • Bandwidth limits and compartmentalization waits on it. Memory wiping may use existing algorithms, but hardware testing is at an early stage.
• Proposed Side-channel suppression for isolated facilities Add
  • Network taps and certifiers waits on it. Radio, power-line and thermal channels are not addressed by network-level designs.
  • Bandwidth limits and compartmentalization waits on it. There is no plan yet for quickly scaling side-channel defences on a frontier cluster; only early theoretical pieces exist.
• Proposed Whole-workload recomputation (reproducible packets) Add
  • Bandwidth limits and compartmentalization waits on it. A fully reproducible inference stack needs substantial software and tooling, and per-packet network reproducibility may need considerable software, firmware and possibly hardware work.
• Operational use Sampled inference recomputation Add
  • Network taps and certifiers depends on it.
  • Bandwidth limits and compartmentalization depends on it.
• Operational use TEE remote attestation for AI workloads Add
  • On-chip telemetry from timing, memory and performance counters depends on it.

Missing prerequisites

• Operational use Sampled inference recomputation needed by Network taps and certifiers and Bandwidth limits and compartmentalization Add
• Operational use Deterministic and bit-exact inference needed by Network taps and certifiers Add
• Research demo Tamper evidence for verifier devices needed by Network taps and certifiers Add
• Proposed Side-channel suppression for isolated facilities needed by Network taps and certifiers Add
• Operational use TEE remote attestation for AI workloads needed by On-chip telemetry from timing, memory and performance counters Add
• Proposed Whole-workload recomputation (reproducible packets) needed by Bandwidth limits and compartmentalization Add

Shared foundations

• Sampled inference recomputation relied on by Network taps and certifiers and Bandwidth limits and compartmentalization
• Tamper evidence for verifier devices relied on by Network taps and certifiers and Bandwidth limits and compartmentalization
• Side-channel suppression for isolated facilities relied on by Network taps and certifiers and Bandwidth limits and compartmentalization

Blockers

15 blockers recorded

• Network taps and certifiers
  • No complete verification tap has been demonstrated at production frontend link rates, and on the tested CPU no hash algorithm reached line rate with minimum-size frames. Performance & compatibility ^{10 24}
  • Nondeterministic inference leaves covert capacity in outputs that hashing cannot remove. Evidence binding. Waits on Deterministic and bit-exact inference ¹
  • Taps and gateway devices need tamper-evident housing and physical monitoring so that traffic cannot bypass them. Hardware trust. Waits on Tamper evidence for verifier devices ^{1 3}
  • Radio, power-line and thermal channels are not addressed by network-level designs. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ¹
  • Red-teaming by specialists is called for but has not been reported. Adversarial validation ¹
• On-chip telemetry from timing, memory and performance counters
  • Shipping accelerators need a tamper-resistant, authenticated telemetry path. Hardware trust. Waits on Hardware-enabled guarantees (flexHEG) and guarantee processors ^{12 13}
  • NVIDIA's full confidential-computing mode disables the hardware performance counters its profiling tools use, so telemetry that needs them conflicts with it. Privacy & leakage ^{14 15}
  • Continuous challenge puzzles cost power and throughput on production workloads. Performance & compatibility ¹¹
  • Evaluation has not gone beyond single nodes, framework-level evasion and one vendor's hardware. Adversarial validation ¹³
• Bandwidth limits and compartmentalization
  • A fully reproducible inference stack needs substantial software and tooling, and per-packet network reproducibility may need considerable software, firmware and possibly hardware work. Performance & compatibility. Waits on Whole-workload recomputation (reproducible packets) ¹⁶
  • Passive optical taps work at 400G, but the 800G and 1600G line rates now arriving in data centres are undemonstrated. Performance & compatibility. Waits on Network taps and certifiers ¹⁶
  • Checking that taps are correctly installed and stay in place at scale is not a solved problem, and hardening the recomputation server inside the prover's facility needs significant research. Hardware trust. Waits on Tamper evidence for verifier devices ^{16 18}
  • There is no plan yet for quickly scaling side-channel defences on a frontier cluster; only early theoretical pieces exist. Coverage & hidden compute. Waits on Side-channel suppression for isolated facilities ¹⁶
  • Memory wiping may use existing algorithms, but hardware testing is at an early stage. Coverage & hidden compute. Waits on Memory wiping and proofs of secure erasure ¹⁶
  • Robust red-teaming of recomputation schemes has not started, and most algorithm development remains academic. Adversarial validation ^{16 18}

From the family or selected implementation's record. ?

Model weights

Depends on the design for Network taps and certifiers and On-chip telemetry from timing, memory and performance counters.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Inputs and outputs

Depends on the design for Network taps and certifiers and On-chip telemetry from timing, memory and performance counters.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Training data

Depends on the design for Network taps and certifiers and On-chip telemetry from timing, memory and performance counters.

Unspecified for Bandwidth limits and compartmentalization. Check the implementation record.

Network taps and certifiers

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Proposed Low-trust AI compute verification system overview Proposed architecture, Machine Intelligence Research Institute
• Proposed SASH confidential network logger Research prototype, Singapore AI Safety Hub (SASH)

On-chip telemetry from timing, memory and performance counters

None on the map

Bandwidth limits and compartmentalization

• Proposed AI 2040 inference-only verification stack Proposed architecture, AI Futures Project
• Proposed RAND secure inference data center (SIDC) design Proposed architecture, RAND

1. Fingerprinting All AI Cluster I/O Without Mutually Trusted Processors, N. Cankaya et al. (2026). Original
2. The Fundamentals and Feasibility of Secure Network Taps for Verifying AI Datacenter Use, N. Cankaya (2026). Original
3. A System Overview for Near-Term, Low-Trust AI Compute Verification, N. Cankaya (2026). Original
4. Verification Plan, R. Dean (2026). Original
5. Fitting a Network TAP to our Inference Verification Prototype, Amodo Design (2026). Original
6. Amodo-Design/Inference-Recomputation-Prototype (GitHub repository), Amodo Design (2026). Original
7. inference-verification: Inference Verification Prototype, Singapore AI Safety Hub (SASH) (2026). Original
8. Internationalising AI Verification, Singapore AI Safety Hub (SASH) (2026). Original
9. Adversarial Entropy Inflation Against Gumbel-Based Inference Verification, N. Kezins (2026). Original
10. Network Tapping for AI Verification: A Technical Assessment, Amodo Design (2026). Original
11. Timing and Memory Telemetry on GPUs for AI Governance, S. K. Monfared et al. (2026). Original
12. Guaranteeable Memory: An HBM-Based Chiplet for Verifiable AI Workloads, J. Petrie (2025). Original
13. Detecting Hidden ML Training With Zero-Overhead Telemetry, R. Rahman & S. Tajdari (2026). Original
14. On TEEs for Privacy-Preserving Monitoring in AI Governance, Gloria Z (2026). Original
15. NVIDIA Secure AI with Blackwell and Hopper GPUs (White Paper), NVIDIA (2025). Original
16. Get Involved in Verification, AI Futures Project (2026). Original
17. Verifying international AI deals: Plan A, the state-of-play, and what you can do to help, T. Milton et al. (2026). Original
18. AI 2040 Plan A — Verification SITREP, Amodo Design (2026). Original
19. Verifying LLM Inference to Detect Model Weight Exfiltration, R. Rinberg et al. (2025). Original
20. DiLoCo: Distributed Low-Communication Training of Language Models, A. Douillard et al. (2024). Original
21. Does Distributed Training Undermine Compute Governance?, R. Rahman (2026). Original
22. Traffic Shaping for Workload Classification, Lucid Computing (2026). Original
23. The Tray as a Bandwidth Boundary, Amodo Design (2026). Original
24. Network Traffic Hashing, Amodo Design (2026). Original